JPS6436352A - Memory error processing system - Google Patents

Memory error processing system

Info

Publication number
JPS6436352A
JPS6436352A JP62192853A JP19285387A JPS6436352A JP S6436352 A JPS6436352 A JP S6436352A JP 62192853 A JP62192853 A JP 62192853A JP 19285387 A JP19285387 A JP 19285387A JP S6436352 A JPS6436352 A JP S6436352A
Authority
JP
Japan
Prior art keywords
error
bit error
register
software
write flag
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62192853A
Other languages
Japanese (ja)
Inventor
Kunio Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62192853A priority Critical patent/JPS6436352A/en
Publication of JPS6436352A publication Critical patent/JPS6436352A/en
Pending legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To segment a software error from a hardware error and to obtain convenience in a maintenance operation, by deciding whether one bit error is the software error or the hardware error from contents held by an error address register, a syndrome register, and a write flag register. CONSTITUTION:In a CPU or a diagnosis processor, the output of the syndrome register 7, the error address register 8, and a write flag circuit 10 are registered after being checked. And when the one bit error is generated, and when the one bit error is registered again in spite of setting the one bit error in the write flag register 10, it is possible to decide the one bit error as the one due to a defective memory device, thereby, it can be separated from the software error. Because the software error of a memory device is recovered by a write instruction at the time of setting the write flag register 59 if it is the software error, and hereafter, no original one bit error is regenerated unless the one bit error is generated newly. In such a way, the decision of a card objected to be exchanged can be easily facilitated in a following maintenance operation.
JP62192853A 1987-07-31 1987-07-31 Memory error processing system Pending JPS6436352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62192853A JPS6436352A (en) 1987-07-31 1987-07-31 Memory error processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62192853A JPS6436352A (en) 1987-07-31 1987-07-31 Memory error processing system

Publications (1)

Publication Number Publication Date
JPS6436352A true JPS6436352A (en) 1989-02-07

Family

ID=16298059

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62192853A Pending JPS6436352A (en) 1987-07-31 1987-07-31 Memory error processing system

Country Status (1)

Country Link
JP (1) JPS6436352A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011054263A (en) * 2009-08-12 2011-03-17 Taiwan Semiconductor Manufacturing Co Ltd Memory error and redundancy
JP2018120413A (en) * 2017-01-25 2018-08-02 Necプラットフォームズ株式会社 Maintenance determining device, maintenance determining method, and program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011054263A (en) * 2009-08-12 2011-03-17 Taiwan Semiconductor Manufacturing Co Ltd Memory error and redundancy
JP2018120413A (en) * 2017-01-25 2018-08-02 Necプラットフォームズ株式会社 Maintenance determining device, maintenance determining method, and program

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