JPS6436117A - Variable delay circuit - Google Patents
Variable delay circuitInfo
- Publication number
- JPS6436117A JPS6436117A JP62175013A JP17501387A JPS6436117A JP S6436117 A JPS6436117 A JP S6436117A JP 62175013 A JP62175013 A JP 62175013A JP 17501387 A JP17501387 A JP 17501387A JP S6436117 A JPS6436117 A JP S6436117A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- delay
- multiplexer
- counter
- synchronizing signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To guarantee a correct match between a synchronizing signal and data by measuring a time delay between two control signals and automatically setting a delay of a delay line to a value corresponding to the measured delay. CONSTITUTION: A counter 30 is controlled by a control circuit 33 which receives a signal SQ and two control signals Q and E and generates a signal making the counter 30 usable and a signal resetting it, and its count value indicates the time delay which is measured in beat units of a clock RCLK. Then the signal SQ controls a multiplexer 31 so that one of 7 inputs 1-7 is selected according to the value of SQ. A shift register 32 and the multiplexer 31 operate as a variable delay line to delay a vertical synchronizing signal VSYNC4 by several bits of the clock signal RCLK specified by the signal SQ. Consequently, the data have correct timing relation with the synchronizing signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62175013A JPS6436117A (en) | 1987-07-15 | 1987-07-15 | Variable delay circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62175013A JPS6436117A (en) | 1987-07-15 | 1987-07-15 | Variable delay circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6436117A true JPS6436117A (en) | 1989-02-07 |
Family
ID=15988689
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62175013A Pending JPS6436117A (en) | 1987-07-15 | 1987-07-15 | Variable delay circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6436117A (en) |
-
1987
- 1987-07-15 JP JP62175013A patent/JPS6436117A/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS5720052A (en) | Input data synchronizing circuit | |
| GB1412779A (en) | Frequency adjustment of timekeepers | |
| GB1534053A (en) | Distinguishing valid from invalid transitions in a two level logic signal | |
| JPS6436117A (en) | Variable delay circuit | |
| JPS56160175A (en) | Synchronous signal generator | |
| JPS57106255A (en) | Bit synchronizing system | |
| JPS5622134A (en) | Asynchronous system serial data receiving device | |
| JPS5634267A (en) | Synchronizing circuit | |
| JPS5346015A (en) | Glide effect device for electronic musical instrument | |
| JPS5685935A (en) | Reversible counting circuit of pulse | |
| JPS5696526A (en) | Timing signal generating system | |
| JPS5758214A (en) | Forming circuit of data sampling clock | |
| JPS5463624A (en) | Blink period-changeable crt display device | |
| JPS6465471A (en) | Pattern generating device | |
| JPS6416013A (en) | Clock distribution circuit | |
| KR910008966A (en) | Horizontal synchronous pulse measuring circuit | |
| JPS5713868A (en) | Two-screen television receiver | |
| JPS606793Y2 (en) | electronic clock | |
| JPS57197630A (en) | Control system for logic circuit in input and output controller | |
| JPS5567261A (en) | Synchronizing clock generation circuit | |
| JPS564935A (en) | Counting circuit | |
| JPS53142121A (en) | Waveform shaping device | |
| JPS5448473A (en) | Coder | |
| JPS553265A (en) | Reception timing device for digital code | |
| JPS575136A (en) | Timing generating circuit |