JPS642986B2 - - Google Patents

Info

Publication number
JPS642986B2
JPS642986B2 JP59005878A JP587884A JPS642986B2 JP S642986 B2 JPS642986 B2 JP S642986B2 JP 59005878 A JP59005878 A JP 59005878A JP 587884 A JP587884 A JP 587884A JP S642986 B2 JPS642986 B2 JP S642986B2
Authority
JP
Japan
Prior art keywords
data
bits
bit
bus
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP59005878A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59226923A (ja
Inventor
Eichi Deiru Furederitsuku
Tei Ringu Danieru
Ii Mateitsuku Richaado
Jei Makuburaido Denisu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS59226923A publication Critical patent/JPS59226923A/ja
Publication of JPS642986B2 publication Critical patent/JPS642986B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4009—Coupling between buses with data restructuring
    • G06F13/4018—Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Executing Machine-Instructions (AREA)
JP59005878A 1983-05-27 1984-01-18 バスインタ−フエ−ス装置 Granted JPS59226923A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49911183A 1983-05-27 1983-05-27
US49911 1993-04-20

Publications (2)

Publication Number Publication Date
JPS59226923A JPS59226923A (ja) 1984-12-20
JPS642986B2 true JPS642986B2 (en, 2012) 1989-01-19

Family

ID=23983863

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59005878A Granted JPS59226923A (ja) 1983-05-27 1984-01-18 バスインタ−フエ−ス装置

Country Status (3)

Country Link
EP (1) EP0127007B1 (en, 2012)
JP (1) JPS59226923A (en, 2012)
DE (1) DE3479455D1 (en, 2012)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4571692A (en) * 1984-04-12 1986-02-18 General Electric Company Electronic demand register
FR2576432B1 (fr) * 1985-01-24 1989-06-02 Brion Alain Dispositif d'echange de donnees entre un calculateur et une unite peripherique
KR900005313A (ko) * 1988-09-14 1990-04-14 존 지.웨브 16비트 데이타 버스에 바이트폭 uart 전송을 이행하는 방법 및 장치
JPH0814814B2 (ja) * 1988-12-27 1996-02-14 工業技術院長 バッファ制御方式
GB2234093B (en) * 1989-06-21 1992-01-15 Stratum Technology Limited Data store connection
US5170477A (en) * 1989-10-31 1992-12-08 Ibm Corporation Odd boundary address aligned direct memory acess device and method
JPH05257851A (ja) * 1991-12-30 1993-10-08 Apple Computer Inc データの転送の順序を制御させる装置
US5887196A (en) 1991-12-30 1999-03-23 Apple Computer, Inc. System for receiving a control signal from a device for selecting its associated clock signal for controlling the transferring of information via a buffer
US5410677A (en) * 1991-12-30 1995-04-25 Apple Computer, Inc. Apparatus for translating data formats starting at an arbitrary byte position
US5640599A (en) * 1991-12-30 1997-06-17 Apple Computer, Inc. Interconnect system initiating data transfer over launch bus at source's clock speed and transfering data over data path at receiver's clock speed
US5848297A (en) * 1991-12-30 1998-12-08 Apple Computer, Inc. Control apparatus for maintaining order and accomplishing priority promotion in a computer interconnect
US5434892A (en) * 1994-09-16 1995-07-18 Intel Corporation Throttling circuit for a data transfer system
JPH10117144A (ja) * 1996-10-08 1998-05-06 Nec Ic Microcomput Syst Ltd Ａ／ｄコンバータ
DE10055939B4 (de) * 2000-11-10 2004-02-05 Harman Becker Automotive Systems (Becker Division) Gmbh Verfahren zum Übertragen einer Nutzinformation, Datenquelle und Datensenke zur Ausführung des Verfahrens

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5478639A (en) * 1977-12-06 1979-06-22 Toshiba Corp Input/output control unit
NL7713707A (nl) * 1977-12-12 1979-06-14 Philips Nv Informatiebuffergeheugen van het "eerst-in, eerst-uit" type met variabele ingang en vaste uitgang.
GB2021823B (en) * 1978-05-30 1983-04-27 Intel Corp Data transfer system
JPS5596434U (en, 2012) * 1978-12-25 1980-07-04
JPS5685130A (en) * 1979-12-12 1981-07-11 Mitsubishi Electric Corp Rom access circuit
FR2477808A1 (fr) * 1980-03-10 1981-09-11 Konto Ghiorghi Andre Dispositif double compteur de photons, notamment pour la spectrometrie

Also Published As

Publication number Publication date
EP0127007B1 (en) 1989-08-16
JPS59226923A (ja) 1984-12-20
DE3479455D1 (en) 1989-09-21
EP0127007A2 (en) 1984-12-05
EP0127007A3 (en) 1987-05-20

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