JPS6427079A - Signal processing circuit - Google Patents

Abstract

PURPOSE:To prevent the generation of an abnormal clock for demodulating and to obtain normal demodulating data by supplementing a pulse to a preamble detecting signal and sending it to an automatic phase control circuit when the counting value of a prescribed frequency goes to the multiple of an integer (m). CONSTITUTION:A reference signal having the frequency of a frequency F0 of a preamble detecting signal S X a prescribed integer (m) is calculated by a counter circuit 8. A pseudo pulse in the signal S is removed by a gate circuit 9 and an AND gate 10. When the lack of the pulse occurs in the signal S and the counting value goes to the multiple of (m), a supplementary pulse is outputted by a pulse generating circuit 11 and sent through a switch 12 to the gate 10. At the gate 10, the supplementary signal is supplemented to the signal S and inputted to an automatic phase control circuit 7 as the preamble detecting signal. Thus, the leak of the pulse in the signal S can be removed.