JPS6425623A - Logic circuit - Google Patents
Logic circuitInfo
- Publication number
- JPS6425623A JPS6425623A JP62183867A JP18386787A JPS6425623A JP S6425623 A JPS6425623 A JP S6425623A JP 62183867 A JP62183867 A JP 62183867A JP 18386787 A JP18386787 A JP 18386787A JP S6425623 A JPS6425623 A JP S6425623A
- Authority
- JP
- Japan
- Prior art keywords
- goes
- input
- low level
- output
- high level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Logic Circuits (AREA)
Abstract
PURPOSE:To facilitate the correspondence to the increase in fan-in number of input by constituting an input section by a bipolar circuit and an output section by a CMOS inverter circuit in an NAND group logic circuit by the BiCMOS process. CONSTITUTION:At least one input of inputs A-D is at a low level, a minute current flows to the input via a high resistive element 1 and the collector of a multimulti-emitter Schottky transistor 2 goes also to a low level. Thus, an N-channel MOS transistor(TR) 4 is turned off and the output X goes to a high level. When all the inputs A-D are at a high level, the collector of the multi- emitter Schottky TR 2 goes also to a high level and the N-channel MOS TR 4 is turned on and the output X goes to a low level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62183867A JPS6425623A (en) | 1987-07-22 | 1987-07-22 | Logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62183867A JPS6425623A (en) | 1987-07-22 | 1987-07-22 | Logic circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6425623A true JPS6425623A (en) | 1989-01-27 |
Family
ID=16143214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62183867A Pending JPS6425623A (en) | 1987-07-22 | 1987-07-22 | Logic circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6425623A (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57157626A (en) * | 1981-03-23 | 1982-09-29 | Fujitsu Ltd | Decoder circuit |
-
1987
- 1987-07-22 JP JP62183867A patent/JPS6425623A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS57157626A (en) * | 1981-03-23 | 1982-09-29 | Fujitsu Ltd | Decoder circuit |
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