JPS6424599U - - Google Patents
Info
- Publication number
- JPS6424599U JPS6424599U JP11961787U JP11961787U JPS6424599U JP S6424599 U JPS6424599 U JP S6424599U JP 11961787 U JP11961787 U JP 11961787U JP 11961787 U JP11961787 U JP 11961787U JP S6424599 U JPS6424599 U JP S6424599U
- Authority
- JP
- Japan
- Prior art keywords
- input terminal
- inverting input
- switch element
- operational amplifier
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000005070 sampling Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Landscapes
- Amplifiers (AREA)
Description
第１図はこの考案の一実施例を示す接続図、第
２図及び第３図はこの考案の動作を説明するため
の波形図、第４図は従来の技術を説明するための
接続図、第５図及び第６図は従来の技術の欠点を
説明するための波形図である。
１……スイツチ素子、２……入力端子、３……
出力端子、４……入力抵抗器、５……帰還抵抗器
、６……サンプルホールド用コンデンサ、７……
演算増幅器、９……サンプリングパルス入力端子
、１０……共通電位点、１１……電極間静電容量
、１２……補助コンデンサ、１３……補助スイツ
チ素子、１４……補助スイツチ素子の電極間静電
容量。
FIG. 1 is a connection diagram showing an embodiment of this invention, FIGS. 2 and 3 are waveform diagrams for explaining the operation of this invention, and FIG. 4 is a connection diagram for explaining the conventional technology. FIGS. 5 and 6 are waveform diagrams for explaining the drawbacks of the conventional technology. 1...Switch element, 2...Input terminal, 3...
Output terminal, 4...Input resistor, 5...Feedback resistor, 6...Sample and hold capacitor, 7...
Operational amplifier, 9...Sampling pulse input terminal, 10...Common potential point, 11...Interelectrode capacitance, 12...Auxiliary capacitor, 13...Auxiliary switch element, 14...Interelectrode static of the auxiliary switch element Capacity.
Claims (1)
号が与えられ、反転入力端子と出力端子の間にホ
ールド用コンデンサを接続した演算増幅器と、 Ｂ この演算増幅器の非反転入力端子と共通電位
点との間に接続され上記ホールド用コンデンサと
同じ容量値を持つ補償用コンデンサと、 Ｃ 非反転入力端子と共通電位点との間に接続さ
れ上記スイツチ素子と同位相でオン、オフ駆動さ
れる補助スイツチ素子と、 から成るサンプルホールド回路。[Claims for Utility Model Registration] A. An operational amplifier whose inverting input terminal receives an input signal through a switch element, and a hold capacitor is connected between the inverting input terminal and the output terminal, and B. A non-inverting input terminal of this operational amplifier. C A compensation capacitor connected between C and the common potential point and having the same capacitance as the above-mentioned hold capacitor; A sample and hold circuit consisting of a driven auxiliary switch element and.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11961787U JPS6424599U (en) | 1987-08-03 | 1987-08-03 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11961787U JPS6424599U (en) | 1987-08-03 | 1987-08-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6424599U true JPS6424599U (en) | 1989-02-09 |
Family
ID=31365003
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11961787U Pending JPS6424599U (en) | 1987-08-03 | 1987-08-03 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6424599U (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS558656A (en) * | 1978-07-04 | 1980-01-22 | Nec Corp | Sample hold circuit |
| JPS5532278A (en) * | 1978-08-29 | 1980-03-06 | Sony Corp | Sample hold circuit |
-
1987
- 1987-08-03 JP JP11961787U patent/JPS6424599U/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS558656A (en) * | 1978-07-04 | 1980-01-22 | Nec Corp | Sample hold circuit |
| JPS5532278A (en) * | 1978-08-29 | 1980-03-06 | Sony Corp | Sample hold circuit |
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