JPS6423549A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To surely execute a synchronized operation in a high-speed region where a delay of transfer inside an internal circuit causes a problem by a method wherein a latch circuit to be operated synchronously from the outside is installed at an input/output buffer part of a semiconductor integrated circuit device. CONSTITUTION:Latch circuits 11, 21 are installed at input/output buffer parts 1, 2. The latch circuits 11, 21 are synchronized with a clock CK which is given from the outside and latch input/output signals Din, Dout of a semiconductor integrated circuit device 10. The clock CK is distributed evenly to the individual latch circuits 11, 21 via an external input terminal P3, a buffer circuit 12 and wiring parts l to be used exclusively for the clock. By this setup, the latch circuits 11, 21 latch the input/output signals Din, Dout of the semiconductor circuit device 10 not inside an internal circuit 3 but inside input/output buffer parts 1, 2; accordingly, the semiconductor integrated circuit device 10 can operate even in a high-speed region where a delay of transfer inside the internal circuit 3 causes a problem while it is surely synchronized with the clock CK given from the outside.