JPS6423357A - Input/output processing system - Google Patents
Input/output processing systemInfo
- Publication number
- JPS6423357A JPS6423357A JP18054787A JP18054787A JPS6423357A JP S6423357 A JPS6423357 A JP S6423357A JP 18054787 A JP18054787 A JP 18054787A JP 18054787 A JP18054787 A JP 18054787A JP S6423357 A JPS6423357 A JP S6423357A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- time point
- controller
- mode conditions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To improve the input/output processing throughput by inhibiting the input/output processing start for a certain period of time from the time point when the release of the busy mode conditions is reported from an input/output device or an input/output controller. CONSTITUTION:A controller tape of a main memory MSU 108 stores the time point when the release of the busy mode conditions is reported via an input/ output device DEV 107 which is controlled by a microprogram or an input/ output controller CU 105. When a channel processor CHP 102 starts the input/ output actions to the CU 105, a register is selected out of the contents of a control table of the MSU 108 and the inhibited time is recognized. Then it is decided whether the input/output actions can be started or not to the CU 105 based on the difference between the present time point and the time point when the busy mode conditions are released. As a result, the proper input/output processes can be started to both the CU 105 and the DEV 107.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18054787A JPS6423357A (en) | 1987-07-20 | 1987-07-20 | Input/output processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18054787A JPS6423357A (en) | 1987-07-20 | 1987-07-20 | Input/output processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6423357A true JPS6423357A (en) | 1989-01-26 |
Family
ID=16085185
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18054787A Pending JPS6423357A (en) | 1987-07-20 | 1987-07-20 | Input/output processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6423357A (en) |
-
1987
- 1987-07-20 JP JP18054787A patent/JPS6423357A/en active Pending
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