JPS6423175A - Logic circuit testing machine - Google Patents

Logic circuit testing machine

Info

Publication number
JPS6423175A
JPS6423175A JP62179533A JP17953387A JPS6423175A JP S6423175 A JPS6423175 A JP S6423175A JP 62179533 A JP62179533 A JP 62179533A JP 17953387 A JP17953387 A JP 17953387A JP S6423175 A JPS6423175 A JP S6423175A
Authority
JP
Japan
Prior art keywords
pin
circuit
terminal
substitute
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62179533A
Other languages
Japanese (ja)
Inventor
Katsuyoshi Teru
Fumio Ono
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP62179533A priority Critical patent/JPS6423175A/en
Publication of JPS6423175A publication Critical patent/JPS6423175A/en
Pending legal-status Critical Current

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  • Tests Of Electronic Circuits (AREA)

Abstract

PURPOSE:To substitute a faulty pin electronic circuit with a pin electronics circuit for an unused pin, etc., by connecting the pin electronic circuit connected to the input/output pin terminal of an adjacent pin as a substitute in case of the trouble of the pin electronic circuit. CONSTITUTION:A pin electronic circuit 14 connected to a number pin (m-1) is healthy, so a transfer relay 17 is off, and a pin electronic circuit 14' connected to a number pin (m) is faulty, so a break contact RS1 disconnects the input/ output terminal through the operation of relays 17 and 16. At the same time, contacts RS2 and RS3 are made to connect the circuit 14 to be connected to an adjacent number pin (m+1) as a substitute. Further, a circuit 14'' to be connected to a number pin (m+2) as an adjacent unused terminal 15 is connected to the input/output pin terminal 15 of the pin (m+1) as a substitute. Further, the circuit 14 corresponding to the terminal 15 of a number pin (m+2) is healthy, so a relay circuit having the same connection condition with the circuit 14 connected to a pin (m-1) terminal 15 is obtained.
JP62179533A 1987-07-17 1987-07-17 Logic circuit testing machine Pending JPS6423175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62179533A JPS6423175A (en) 1987-07-17 1987-07-17 Logic circuit testing machine

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62179533A JPS6423175A (en) 1987-07-17 1987-07-17 Logic circuit testing machine

Publications (1)

Publication Number Publication Date
JPS6423175A true JPS6423175A (en) 1989-01-25

Family

ID=16067417

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62179533A Pending JPS6423175A (en) 1987-07-17 1987-07-17 Logic circuit testing machine

Country Status (1)

Country Link
JP (1) JPS6423175A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07191096A (en) * 1993-12-27 1995-07-28 Nec Corp Testing device
JP2010101771A (en) * 2008-10-24 2010-05-06 Yokogawa Electric Corp Semiconductor test apparatus, semiconductor test method, and semiconductor test program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07191096A (en) * 1993-12-27 1995-07-28 Nec Corp Testing device
JP2010101771A (en) * 2008-10-24 2010-05-06 Yokogawa Electric Corp Semiconductor test apparatus, semiconductor test method, and semiconductor test program

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