JPS642305B2 - - Google Patents

Info

Publication number
JPS642305B2
JPS642305B2 JP57016627A JP1662782A JPS642305B2 JP S642305 B2 JPS642305 B2 JP S642305B2 JP 57016627 A JP57016627 A JP 57016627A JP 1662782 A JP1662782 A JP 1662782A JP S642305 B2 JPS642305 B2 JP S642305B2
Authority
JP
Japan
Prior art keywords
signal
value
reading
error
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57016627A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58134560A (ja
Inventor
Kazunori Ishikawa
Tadakazu Morisawa
Masafumi Oonuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP57016627A priority Critical patent/JPS58134560A/ja
Publication of JPS58134560A publication Critical patent/JPS58134560A/ja
Publication of JPS642305B2 publication Critical patent/JPS642305B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits
    • H04L27/156—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width
    • H04L27/1566—Demodulator circuits; Receiver circuits with demodulation using temporal properties of the received signal, e.g. detecting pulse width using synchronous sampling

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP57016627A 1982-02-04 1982-02-04 非同期信号検出方式 Granted JPS58134560A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57016627A JPS58134560A (ja) 1982-02-04 1982-02-04 非同期信号検出方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57016627A JPS58134560A (ja) 1982-02-04 1982-02-04 非同期信号検出方式

Publications (2)

Publication Number Publication Date
JPS58134560A JPS58134560A (ja) 1983-08-10
JPS642305B2 true JPS642305B2 (enrdf_load_stackoverflow) 1989-01-17

Family

ID=11921587

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57016627A Granted JPS58134560A (ja) 1982-02-04 1982-02-04 非同期信号検出方式

Country Status (1)

Country Link
JP (1) JPS58134560A (enrdf_load_stackoverflow)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5127342B2 (ja) * 2007-07-26 2013-01-23 株式会社東芝 受信装置および方法

Also Published As

Publication number Publication date
JPS58134560A (ja) 1983-08-10

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