JPS6422104A - Variable delay line - Google Patents

Variable delay line

Info

Publication number
JPS6422104A
JPS6422104A JP62178500A JP17850087A JPS6422104A JP S6422104 A JPS6422104 A JP S6422104A JP 62178500 A JP62178500 A JP 62178500A JP 17850087 A JP17850087 A JP 17850087A JP S6422104 A JPS6422104 A JP S6422104A
Authority
JP
Japan
Prior art keywords
delay time
delay line
diode
variable
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62178500A
Other languages
Japanese (ja)
Inventor
Kazuo Kametani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elmec Corp
Original Assignee
Elmec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elmec Corp filed Critical Elmec Corp
Priority to JP62178500A priority Critical patent/JPS6422104A/en
Publication of JPS6422104A publication Critical patent/JPS6422104A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To obtain a delay time stable to a temperature change by correcting a voltage impressed to a variable capacity diode in a variable delay line element serially connected to a buffer circuit with a temperature characteristic reverse to the temperature characteristic of the buffer circuit. CONSTITUTION:To plural taps provided on respective wound inductance elements L, one edge of a variable capacity diode Dv is connected, a variable delay line element DL is formed and by the voltage impressed to the diode Dv, the delay time of the element DL is changed. The element DL is serially connected through an inverter circuit (buffer circuit) I and a variable delay line is constituted. When an ambient temperature rises, the propagation delay time of the inverter circuit I is increased, a control signal from a signal source DAC is increased in a negative direction by a correcting circuit 7 only for the increased part, and thereafter, it is impressed to the diode Dv, and therefore, even when the ambient temperature is changed, the propagation delay time correction of the inverter circuit I can be automatically executed.
JP62178500A 1987-07-17 1987-07-17 Variable delay line Pending JPS6422104A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62178500A JPS6422104A (en) 1987-07-17 1987-07-17 Variable delay line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62178500A JPS6422104A (en) 1987-07-17 1987-07-17 Variable delay line

Publications (1)

Publication Number Publication Date
JPS6422104A true JPS6422104A (en) 1989-01-25

Family

ID=16049548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62178500A Pending JPS6422104A (en) 1987-07-17 1987-07-17 Variable delay line

Country Status (1)

Country Link
JP (1) JPS6422104A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0385814A (en) * 1989-08-29 1991-04-11 Nec Corp Semiconductor delay circuit
JPH042127U (en) * 1990-04-20 1992-01-09
KR20030086770A (en) * 2002-05-07 2003-11-12 (주)실리콘세븐 Temperature-compensated delay circuit
JPWO2007072551A1 (en) * 2005-12-20 2009-05-28 富士通株式会社 Voltage controlled ring oscillator

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0385814A (en) * 1989-08-29 1991-04-11 Nec Corp Semiconductor delay circuit
JPH042127U (en) * 1990-04-20 1992-01-09
KR20030086770A (en) * 2002-05-07 2003-11-12 (주)실리콘세븐 Temperature-compensated delay circuit
JPWO2007072551A1 (en) * 2005-12-20 2009-05-28 富士通株式会社 Voltage controlled ring oscillator
US8044727B2 (en) 2005-12-20 2011-10-25 Fujitsu Limited Phased locked loop circuit including voltage controlled ring oscillator

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