JPS6420629A - Compound semiconductor integrated circuit device - Google Patents
Compound semiconductor integrated circuit deviceInfo
- Publication number
- JPS6420629A JPS6420629A JP17739687A JP17739687A JPS6420629A JP S6420629 A JPS6420629 A JP S6420629A JP 17739687 A JP17739687 A JP 17739687A JP 17739687 A JP17739687 A JP 17739687A JP S6420629 A JPS6420629 A JP S6420629A
- Authority
- JP
- Japan
- Prior art keywords
- fet
- operation layer
- products
- integrated
- types
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To freely adjust a threshold voltage and to improve the nondefective rate of products by laminating a plurality of layers each having two types of reverse internal stresses in the formation of an insulating film on an insulating substrate on which elements including a FET are integrated, and reducing the film thickness on a FET element. CONSTITUTION:Interlayer insulating films 7-9 each having two types of compression and tension stresses are laminated under a predetermined condition on a semi-insulating GaAs substrate 1 on which elements, such as a resistor operation layer 2, a FET operation layer 3 and a diode operation layer 4 and the like are integrated. Accordingly, when with resist as a mask on the gate electrode 5 of a FET it is opened and a measurement of a threshold voltage and an etching back of an interlayer insulating film of the opening due to RIE are repeated, the value of the threshold of the FET can be finely adjusted. As a result, the nondefective rate of products is enhanced.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17739687A JPS6420629A (en) | 1987-07-16 | 1987-07-16 | Compound semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17739687A JPS6420629A (en) | 1987-07-16 | 1987-07-16 | Compound semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6420629A true JPS6420629A (en) | 1989-01-24 |
Family
ID=16030195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17739687A Pending JPS6420629A (en) | 1987-07-16 | 1987-07-16 | Compound semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6420629A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0715346A2 (en) | 1994-11-30 | 1996-06-05 | Fujitsu Limited | Method of forming a MESFET with a T-shaped gate electrode and device formed thereby |
| US6075262A (en) * | 1995-09-21 | 2000-06-13 | Fujitsu Limited | Semiconductor device having T-shaped gate electrode |
| WO2007091301A1 (en) * | 2006-02-07 | 2007-08-16 | Fujitsu Limited | Semiconductor device and process for producing the same |
| JP2013514661A (en) * | 2009-12-16 | 2013-04-25 | ナショナル セミコンダクター コーポレーション | Stress compensation for large area gallium nitride or other nitride-based structures on semiconductor substrates |
-
1987
- 1987-07-16 JP JP17739687A patent/JPS6420629A/en active Pending
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0715346A2 (en) | 1994-11-30 | 1996-06-05 | Fujitsu Limited | Method of forming a MESFET with a T-shaped gate electrode and device formed thereby |
| US5686325A (en) * | 1994-11-30 | 1997-11-11 | Fujitsu Limited | Method for forming MESFET having T-shaped gate electrode |
| EP0715346A3 (en) * | 1994-11-30 | 1999-06-16 | Fujitsu Limited | Method of forming a MESFET with a T-shaped gate electrode and device formed thereby |
| EP1249862A2 (en) * | 1994-11-30 | 2002-10-16 | Fujitsu Limited | Semiconductor device and method for forming the same |
| US6075262A (en) * | 1995-09-21 | 2000-06-13 | Fujitsu Limited | Semiconductor device having T-shaped gate electrode |
| WO2007091301A1 (en) * | 2006-02-07 | 2007-08-16 | Fujitsu Limited | Semiconductor device and process for producing the same |
| US7960763B2 (en) | 2006-02-07 | 2011-06-14 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
| US8163653B2 (en) | 2006-02-07 | 2012-04-24 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
| US8227838B2 (en) | 2006-02-07 | 2012-07-24 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
| US8399361B2 (en) | 2006-02-07 | 2013-03-19 | Fujitsu Limited | Semiconductor device and method of manufacturing the same |
| JP2013514661A (en) * | 2009-12-16 | 2013-04-25 | ナショナル セミコンダクター コーポレーション | Stress compensation for large area gallium nitride or other nitride-based structures on semiconductor substrates |
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