JPS6415884A - Arithmetic circuit - Google Patents

Abstract

PURPOSE:To separate a numerical operation with a high bit-number and a logical operation with a low bit-number and to effectively execute an arithmetic operation at a high speed by multiplying picture element data with numerical values suitably, distributing the result of this multiplication to selectors, integrating outputs therefrom, and executing a pattern comparison and the logical operation before inputting to the selectors. CONSTITUTION:Suitable numerical values A0-A(n-1) are respectively multiplied on n-pieces of picture element data D0-D(n-1) inputted to a multiplication part 1, and resulting D'0-D'(n-1) are transmitted to an integration part via selectors 2. In the integration part, adding, subtraction and other arithmetic operations are executed, and the results are outputted to a pipe line in the following stage. In this constitution, a logical part 5 is provided in a part of the output of the multiplication part 1, where logical operations such as AND, NAND, OR are executed, while in a state arithmetic part 9 connected to the output of the multiplication part, a pattern comparison by means of a pattern matching register is executed. Thereafter, an output therefrom also is transmitted to the pipe line in the following stage. Thus a video processing is executed at a higher speed than that in case a general purpose large computer is employed.