JPS6413292A - Dynamic type storage device - Google Patents

Abstract

PURPOSE:To enable an efficient and general useful SREF function to be loaded by executing self-refreshment (SREF) with the phase timing and the voltage of an inversion RAS and an inversion CAS input signal. CONSTITUTION:By making the inverse CAS input signal 2 to be L and making the inverse of RAS input signal to be L after delay time (tD), a basic clock phiOSC11 asynchronously generating an RAS signal inside is generated by the SREF control circuit 3 when the circuit 3 receives a self-refreshment demand and starts an oscillation circuit 4 and the signal phiOSCD12 of a cycle T is generated through a frequency devider circuit 5. The signal phiOSCD12 is wave-formed by a control circuit 7 for generating an internal RAS. Then a pulse width is optimized and an inversion RASI14 is generated. After receiving the SREF operation demand based on the phase and the voltage conditions of the inverse RAS and the inverse of CAS signal, the circuit 5 receives the signal of T/2, inputs it to an external RAS circuit control circuit 6, resets the output signal inverse RASO13 of the circuit 6, executes latch and controls an internal RAS signal to repeatedly execute REF operation. A signal IntRAS15 starts an internal address counter control circuit 8 and executes the SREF through an internal address counter circuit 9.