JPS641327A - Or circuit device - Google Patents
Or circuit deviceInfo
- Publication number
- JPS641327A JPS641327A JP62156963A JP15696387A JPS641327A JP S641327 A JPS641327 A JP S641327A JP 62156963 A JP62156963 A JP 62156963A JP 15696387 A JP15696387 A JP 15696387A JP S641327 A JPS641327 A JP S641327A
- Authority
- JP
- Japan
- Prior art keywords
- level
- input signal
- circuit device
- transistor
- turned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Logic Circuits (AREA)
Abstract
PURPOSE: To reduce the number of elements used in an OR circuit device, by setting a nonconductive state between two conductive terminals when a 1st input signal is low in logic level and a conductive state between the two terminals when the 1st input signal is high in logic level.
CONSTITUTION: Since the transistor P1 of an inverter circuit 1 is turned off and the other transistor N1 is turned on when the 1st input signal is high in level, an output signals C becomes low in level. Therefore, at the next-stage switching circuit 2, its output signals Y becomes high in level regardless of a 2nd input signal B. Since the transistor P1 is turned on and transistor N1 is turned off when the input signal A is low in level, the output signal C becomes high in level. As a result, the 2nd input signal B is outputted from an output terminal (y) as it is as the output signal Y. When the operation of this circuit device is expressed in a logical expression, the expression becomes Y=A+B and this circuit device functions as a two-input OR gate circuit. Therefore, the number of the elements used in this circuit device can be reduced.
COPYRIGHT: (C)1989,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-156963A JPH011327A (en) | 1987-06-23 | OR circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62-156963A JPH011327A (en) | 1987-06-23 | OR circuit device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS641327A true JPS641327A (en) | 1989-01-05 |
JPH011327A JPH011327A (en) | 1989-01-05 |
Family
ID=
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5166555A (en) * | 1990-05-31 | 1992-11-24 | Nec Corporation | Drive circuit comprising a subsidiary drive circuit |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5166555A (en) * | 1990-05-31 | 1992-11-24 | Nec Corporation | Drive circuit comprising a subsidiary drive circuit |
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