JPS6413130U - - Google Patents

Info

Publication number
JPS6413130U
JPS6413130U JP10771187U JP10771187U JPS6413130U JP S6413130 U JPS6413130 U JP S6413130U JP 10771187 U JP10771187 U JP 10771187U JP 10771187 U JP10771187 U JP 10771187U JP S6413130 U JPS6413130 U JP S6413130U
Authority
JP
Japan
Prior art keywords
semiconductor device
alignment mark
view
semiconductor substrate
cutting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10771187U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10771187U priority Critical patent/JPS6413130U/ja
Publication of JPS6413130U publication Critical patent/JPS6413130U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図aは本考案を用いた一導電型半導体基板
の平面図、第1図bはスクライブラインの断面図
、第1図cはアライメントマーク周辺の拡大図、
第2図aは従来の基板の平面図、第2図bは従来
のスクライブラインの断面図、第3図は長尺読み
取り可能な半導体装置の斜視図である。 1……一導電型半導体基板、2……半導体装置
、3……スクライブライン、4……アライメント
マーク。
FIG. 1a is a plan view of a semiconductor substrate of one conductivity type using the present invention, FIG. 1b is a cross-sectional view of a scribe line, and FIG. 1c is an enlarged view of the vicinity of an alignment mark.
FIG. 2a is a plan view of a conventional substrate, FIG. 2b is a sectional view of a conventional scribe line, and FIG. 3 is a perspective view of a long-length readable semiconductor device. 1... Semiconductor substrate of one conductivity type, 2... Semiconductor device, 3... Scribe line, 4... Alignment mark.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 表面部分に形成された半導体装置を高精度に切
断する目印として前記半導体装置を製造するため
に用いた薄膜で形成したアライメントマークを有
する半導体基板。
A semiconductor substrate having an alignment mark formed on a surface portion of a thin film used for manufacturing the semiconductor device as a mark for cutting the semiconductor device with high precision.
JP10771187U 1987-07-14 1987-07-14 Pending JPS6413130U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10771187U JPS6413130U (en) 1987-07-14 1987-07-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10771187U JPS6413130U (en) 1987-07-14 1987-07-14

Publications (1)

Publication Number Publication Date
JPS6413130U true JPS6413130U (en) 1989-01-24

Family

ID=31342368

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10771187U Pending JPS6413130U (en) 1987-07-14 1987-07-14

Country Status (1)

Country Link
JP (1) JPS6413130U (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610944A (en) * 1979-07-06 1981-02-03 Mitsubishi Electric Corp Division of semiconductor device
JPS6151845A (en) * 1984-08-21 1986-03-14 Matsushita Electronics Corp Dicing of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5610944A (en) * 1979-07-06 1981-02-03 Mitsubishi Electric Corp Division of semiconductor device
JPS6151845A (en) * 1984-08-21 1986-03-14 Matsushita Electronics Corp Dicing of semiconductor device

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