JPS6186942U - - Google Patents

Info

Publication number
JPS6186942U
JPS6186942U JP17115884U JP17115884U JPS6186942U JP S6186942 U JPS6186942 U JP S6186942U JP 17115884 U JP17115884 U JP 17115884U JP 17115884 U JP17115884 U JP 17115884U JP S6186942 U JPS6186942 U JP S6186942U
Authority
JP
Japan
Prior art keywords
diffusion layer
concentration diffusion
low concentration
semiconductor substrate
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17115884U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP17115884U priority Critical patent/JPS6186942U/ja
Publication of JPS6186942U publication Critical patent/JPS6186942U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例の平面図、第2図
は第1図のAA線断面図、第3図は第1図のBB
線断面図、第4図は従来例の平面図、第5図は第
4図のCC線断面図、第6図は第4図のDD線断
面図である。 11,21……シリコン基板、12,22……
高抵抗層、13,23……抵抗層。
Fig. 1 is a plan view of an embodiment of this invention, Fig. 2 is a sectional view taken along line AA in Fig. 1, and Fig. 3 is a sectional view taken along line AA in Fig. 1.
4 is a plan view of the conventional example, FIG. 5 is a sectional view taken along line CC in FIG. 4, and FIG. 6 is a sectional view taken along line DD in FIG. 4. 11, 21... Silicon substrate, 12, 22...
High resistance layer, 13, 23...resistance layer.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体基板中に設けられた低濃度拡散層と、こ
の低濃度拡散層中に形成される高濃度拡散層とよ
り構成される拡散リード。
A diffusion lead is composed of a low concentration diffusion layer provided in a semiconductor substrate and a high concentration diffusion layer formed in the low concentration diffusion layer.
JP17115884U 1984-11-12 1984-11-12 Pending JPS6186942U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17115884U JPS6186942U (en) 1984-11-12 1984-11-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17115884U JPS6186942U (en) 1984-11-12 1984-11-12

Publications (1)

Publication Number Publication Date
JPS6186942U true JPS6186942U (en) 1986-06-07

Family

ID=30728853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17115884U Pending JPS6186942U (en) 1984-11-12 1984-11-12

Country Status (1)

Country Link
JP (1) JPS6186942U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53108394A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Semiconductor intergrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53108394A (en) * 1977-03-04 1978-09-21 Hitachi Ltd Semiconductor intergrated circuit device

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