JPS6413129U - - Google Patents

Info

Publication number
JPS6413129U
JPS6413129U JP1987107993U JP10799387U JPS6413129U JP S6413129 U JPS6413129 U JP S6413129U JP 1987107993 U JP1987107993 U JP 1987107993U JP 10799387 U JP10799387 U JP 10799387U JP S6413129 U JPS6413129 U JP S6413129U
Authority
JP
Japan
Prior art keywords
lead conductor
pattern
conductor
conductor pattern
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987107993U
Other languages
English (en)
Japanese (ja)
Other versions
JPH0526746Y2 (US20100223739A1-20100909-C00025.png
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987107993U priority Critical patent/JPH0526746Y2/ja
Priority to EP88306454A priority patent/EP0299768A3/en
Priority to US07/219,218 priority patent/US4949155A/en
Publication of JPS6413129U publication Critical patent/JPS6413129U/ja
Application granted granted Critical
Publication of JPH0526746Y2 publication Critical patent/JPH0526746Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49572Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0254High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection ; Arrangements for regulating voltages or for using plural voltages

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
JP1987107993U 1987-07-14 1987-07-14 Expired - Lifetime JPH0526746Y2 (US20100223739A1-20100909-C00025.png)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP1987107993U JPH0526746Y2 (US20100223739A1-20100909-C00025.png) 1987-07-14 1987-07-14
EP88306454A EP0299768A3 (en) 1987-07-14 1988-07-14 Tape carrier for semiconductor chips
US07/219,218 US4949155A (en) 1987-07-14 1988-07-14 Tape carrier for semiconductor chips

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987107993U JPH0526746Y2 (US20100223739A1-20100909-C00025.png) 1987-07-14 1987-07-14

Publications (2)

Publication Number Publication Date
JPS6413129U true JPS6413129U (US20100223739A1-20100909-C00025.png) 1989-01-24
JPH0526746Y2 JPH0526746Y2 (US20100223739A1-20100909-C00025.png) 1993-07-07

Family

ID=14473261

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987107993U Expired - Lifetime JPH0526746Y2 (US20100223739A1-20100909-C00025.png) 1987-07-14 1987-07-14

Country Status (3)

Country Link
US (1) US4949155A (US20100223739A1-20100909-C00025.png)
EP (1) EP0299768A3 (US20100223739A1-20100909-C00025.png)
JP (1) JPH0526746Y2 (US20100223739A1-20100909-C00025.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03129746A (ja) * 1989-07-21 1991-06-03 Toshiba Corp 半導体装置

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5237201A (en) * 1989-07-21 1993-08-17 Kabushiki Kaisha Toshiba TAB type semiconductor device and method of manufacturing the same
JPH07123133B2 (ja) * 1990-08-13 1995-12-25 株式会社東芝 フィルムキャリア構造
JP2665424B2 (ja) * 1992-02-07 1997-10-22 タバイエスペック株式会社 パッケージ搬送装置及びパッケージテスト装置
JP2812627B2 (ja) * 1992-10-30 1998-10-22 三菱電機株式会社 テープキャリア、半導体装置試験方法及び装置
JP3387726B2 (ja) * 1996-04-10 2003-03-17 松下電器産業株式会社 部品実装用基板とその製造方法およびモジュールの製造方法
MY138743A (en) * 1996-05-13 2009-07-31 Mitsui Mining & Smelting Co High tensile strength electrodeposited copper foil and the production process of the same
JP3482850B2 (ja) * 1997-12-08 2004-01-06 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
US6372526B1 (en) * 1998-04-06 2002-04-16 Semiconductor Components Industries Llc Method of manufacturing semiconductor components
JP3484365B2 (ja) * 1999-01-19 2004-01-06 シャープ株式会社 半導体装置用パッケージ、この半導体装置用パッケージのテスト時に使用するプローブカード、および、このプローブカードを用いたパッケージのテスト方法
US6915566B2 (en) * 1999-03-01 2005-07-12 Texas Instruments Incorporated Method of fabricating flexible circuits for integrated circuit interconnections
US6359233B1 (en) * 1999-10-26 2002-03-19 Intel Corporation Printed circuit board multipack structure having internal gold fingers and multipack and printed circuit board formed therefrom, and methods of manufacture thereof
US6436517B1 (en) * 2000-05-08 2002-08-20 Irwin Zahn Continuous molded electronic circuits
US20060081968A1 (en) * 2004-10-15 2006-04-20 Bai Shwang S Semiconductor package
US7679003B2 (en) * 2005-05-24 2010-03-16 Nec Electronics Corporation Carrier tape
US20080024917A1 (en) * 2006-02-24 2008-01-31 John Hynes Holographic magnetic stripe demetalization security
AU2006338593B2 (en) * 2006-02-24 2012-02-02 Opsec Security Group Inc. Method of reducing electro-static discharge (ESD) from conductors on insulators
EP1928024A1 (fr) * 2006-12-01 2008-06-04 Axalto SA Film-support pour modules à puce électronique, lequel est adapté au contrôle automatique de câblage et procédé de fabrication de modules à puce électronique
DE102010047912A1 (de) 2010-10-11 2012-04-12 Polylc Gmbh & Co. Kg Überspannungsschutz für elektrisch leitfähige Strukturen
CN103473593B (zh) * 2012-06-05 2018-10-19 德昌电机(深圳)有限公司 智能卡、智能卡接触垫载板及其制造方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6117737U (ja) * 1984-07-06 1986-02-01 日本電気株式会社 半導体装置
JPS6117752U (ja) * 1984-07-05 1986-02-01 シャープ株式会社 テ−プキヤリア半導体装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3689991A (en) * 1968-03-01 1972-09-12 Gen Electric A method of manufacturing a semiconductor device utilizing a flexible carrier
CH599025A5 (US20100223739A1-20100909-C00025.png) * 1976-04-23 1978-05-12 Grapha Holding Ag
US4209355A (en) * 1978-07-26 1980-06-24 National Semiconductor Corporation Manufacture of bumped composite tape for automatic gang bonding of semiconductor devices
DE3234745C2 (de) * 1982-09-20 1986-03-06 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Handhabung von filmmontierten integrierten Schaltkreisen und Vorrichtung zu seiner Durchführung
JPS59103361A (ja) * 1983-09-21 1984-06-14 Hitachi Ltd 樹脂封止型半導体装置用リ−ドフレ−ム
US4736236A (en) * 1984-03-08 1988-04-05 Olin Corporation Tape bonding material and structure for electronic circuit fabrication
JPS60198850A (ja) * 1984-03-23 1985-10-08 Nec Corp リ−ド・フレ−ム
DD238175A3 (de) * 1984-05-02 1986-08-13 Zeiss Jena Veb Carl Einrichtung zur schwingungsdaempfung in vakuumsystemen
EP0213575B1 (en) * 1985-08-23 1992-10-21 Nec Corporation Method of manufacturing a semiconductor device employing a film carrier tape
JPS62150728A (ja) * 1985-12-25 1987-07-04 Hitachi Ltd テ−プキヤリアおよびそれを用いた半導体装置
US4721993A (en) * 1986-01-31 1988-01-26 Olin Corporation Interconnect tape for use in tape automated bonding
US4689875A (en) * 1986-02-13 1987-09-01 Vtc Incorporated Integrated circuit packaging process
US4822989A (en) * 1986-05-21 1989-04-18 Hitachi, Ltd. Semiconductor device and method of manufacturing thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6117752U (ja) * 1984-07-05 1986-02-01 シャープ株式会社 テ−プキヤリア半導体装置
JPS6117737U (ja) * 1984-07-06 1986-02-01 日本電気株式会社 半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03129746A (ja) * 1989-07-21 1991-06-03 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
EP0299768A3 (en) 1989-09-06
JPH0526746Y2 (US20100223739A1-20100909-C00025.png) 1993-07-07
EP0299768A2 (en) 1989-01-18
US4949155A (en) 1990-08-14

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