JPS6412718A - Double pulse generation circuit - Google Patents
Double pulse generation circuitInfo
- Publication number
- JPS6412718A JPS6412718A JP62169288A JP16928887A JPS6412718A JP S6412718 A JPS6412718 A JP S6412718A JP 62169288 A JP62169288 A JP 62169288A JP 16928887 A JP16928887 A JP 16928887A JP S6412718 A JPS6412718 A JP S6412718A
- Authority
- JP
- Japan
- Prior art keywords
- coaxial cable
- whose
- dly
- transistor
- double pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Pulse Circuits (AREA)
Abstract
PURPOSE:To prevent skew from being generated and to generate a stable double pulse, by connecting a coaxial cable whose one side is opened, and setting a delay time from the output terminal of a buffer gate as an interval time. CONSTITUTION:To the connecting line of the collector electrode of a transistor Q and the buffer gate U2, the one end of the coaxial cable DLY whose one end is opened is connected, and a positive voltage source +V is connected via a resistor R4. The delay time of the coaxial cable DLY is adjusted to the delay time of 1/2 of the interval time T. When a pulse Vin is applied, it is added on the transistor Q as a voltage V1. By turning on the transistor Q, a signal is reciprocated in the coaxial cable DLY whose one end is opened as shown in path B. As a result, the double pulse whose interval time is T1 can be taken out from the output terminal OUT of the buffer gate U2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62169288A JPH0756934B2 (en) | 1987-07-07 | 1987-07-07 | Double pulse generation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62169288A JPH0756934B2 (en) | 1987-07-07 | 1987-07-07 | Double pulse generation circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6412718A true JPS6412718A (en) | 1989-01-17 |
JPH0756934B2 JPH0756934B2 (en) | 1995-06-14 |
Family
ID=15883740
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62169288A Expired - Lifetime JPH0756934B2 (en) | 1987-07-07 | 1987-07-07 | Double pulse generation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0756934B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03207336A (en) * | 1990-01-10 | 1991-09-10 | Olympus Optical Co Ltd | Externally attached television camera for endoscope |
CN100417983C (en) * | 2004-06-03 | 2008-09-10 | 夏普株式会社 | Liquid crystal display device and substrate to be used for liquid crystal display device, and methods for producing the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5854725A (en) * | 1981-09-29 | 1983-03-31 | Fujitsu Ltd | Delay circuit |
-
1987
- 1987-07-07 JP JP62169288A patent/JPH0756934B2/en not_active Expired - Lifetime
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5854725A (en) * | 1981-09-29 | 1983-03-31 | Fujitsu Ltd | Delay circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03207336A (en) * | 1990-01-10 | 1991-09-10 | Olympus Optical Co Ltd | Externally attached television camera for endoscope |
CN100417983C (en) * | 2004-06-03 | 2008-09-10 | 夏普株式会社 | Liquid crystal display device and substrate to be used for liquid crystal display device, and methods for producing the same |
Also Published As
Publication number | Publication date |
---|---|
JPH0756934B2 (en) | 1995-06-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
GB1100620A (en) | Electronic relay | |
ES2000218A6 (en) | On-line serial communication interfaces. | |
JPH0691444B2 (en) | Complementary insulated gate inverter | |
JPS6412718A (en) | Double pulse generation circuit | |
GB1360760A (en) | Rectangular pulse generator | |
JPS6431258A (en) | Microprocessor | |
JPS6439814A (en) | Bus bar transmission circuit | |
JPS54148464A (en) | Pulse generating circuit | |
GB976310A (en) | Improvements in or relating to electric gating circuits | |
GB1482798A (en) | Dc signal receiving circuits | |
JPS6423617A (en) | Fet capacitance driver logic circuit | |
SU447818A1 (en) | Pulse Generator | |
JPS57162834A (en) | Pulse generating circuit | |
SU1084979A1 (en) | Sawtooth voltage generator | |
SU663093A1 (en) | Pulse shaper | |
JPS57207421A (en) | Waveform shaping circuit | |
JPS5623030A (en) | Reference voltage generating circuit for cml circuit | |
SU1368955A1 (en) | Synchronized pulse shaper | |
EP0308169A3 (en) | Charge injection circuit | |
JPS5623023A (en) | Input buffer circuit | |
SU422100A1 (en) | CONTACTLESS SWITCH | |
JPS6471316A (en) | Pulse reception circuit | |
JPS5496958A (en) | Clear signal generating circuit | |
JPS5711537A (en) | Logical circuit | |
GB1182620A (en) | Improvements in or relating to Electric Pulse-Regenerating Circuit Arrangements |