JPS5496958A - Clear signal generating circuit - Google Patents

Clear signal generating circuit

Info

Publication number
JPS5496958A
JPS5496958A JP406078A JP406078A JPS5496958A JP S5496958 A JPS5496958 A JP S5496958A JP 406078 A JP406078 A JP 406078A JP 406078 A JP406078 A JP 406078A JP S5496958 A JPS5496958 A JP S5496958A
Authority
JP
Japan
Prior art keywords
voltage
waveform
clear signal
change
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP406078A
Other languages
Japanese (ja)
Inventor
Kazumi Kawashima
Tsutomu Nozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP406078A priority Critical patent/JPS5496958A/en
Publication of JPS5496958A publication Critical patent/JPS5496958A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied

Landscapes

  • Electronic Switches (AREA)

Abstract

PURPOSE:To ensure an assured clearing of the internal state of LSI at the ON/OFF time of the power source by generating the switching output in accordance with the integrating output of the power voltage. CONSTITUTION:If the voltage featuring waveform (I) is applied to terminal 8 in case the power voltage has a sudden change, the voltage at point B changes like waveform (J). On the other hand, the voltage at point C changes like waveform (K), and the collector voltage of transistor 14 which is to be the output voltage of the clear signal generating circuit features the change like waveform (L). Then in case the power voltage has a slow change, the voltage featuring waveform (O) is applied to terminal 8. Thus, the voltage at point B and C changes like waveform (P) and (Q), and the output of the generating circuit has the change like waveform (R). As a result, the clear signal to be applied to terminal 4a of LSI4 features the sudden fall and rise, and accordingly the assured clearing is secured for LSI4 even though the threshold voltage of the buffer circuit may differ.
JP406078A 1978-01-17 1978-01-17 Clear signal generating circuit Pending JPS5496958A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP406078A JPS5496958A (en) 1978-01-17 1978-01-17 Clear signal generating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP406078A JPS5496958A (en) 1978-01-17 1978-01-17 Clear signal generating circuit

Publications (1)

Publication Number Publication Date
JPS5496958A true JPS5496958A (en) 1979-07-31

Family

ID=11574310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP406078A Pending JPS5496958A (en) 1978-01-17 1978-01-17 Clear signal generating circuit

Country Status (1)

Country Link
JP (1) JPS5496958A (en)

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