JPS6392028A - Semiconductor device - Google Patents

Abstract

PURPOSE:To prevent diffusion of impurities when high temperature reflow of a BPSG film for insulation and isolation is performing, by providing insulating and isolating films having three layers of a thermal oxide film, a CVD oxide film and a BPSG (boro-phospho-silicate glass) film on a semiconductor substrate. CONSTITUTION:A thermal oxide film 2 is provided on one surface of a semiconductor substrate 1 by a thermal oxidation method. A CVD oxide film 3 is formed by a CVD method. A BPSG film 4 is laminated by a CVD method. Thereafter, a light sensitive resin 5 is applied by a spinner method and the like. Then, the BPSG film 4 and the CVD oxide film 3 are etched away. The amount of etching of the CVD oxide film is adjusted so that the thickness of the CVD oxide film 3 becomes the sufficient thickness together with the thermal oxide film so as to prevent the diffusion of impurities that are yielded at the high temperature reflow of the BPSG film 4.

Description

[Detailed Description of the Invention] [Industrial Field of Application] The present invention relates to semiconductor devices, particularly those for use onboard artificial satellites, etc. that emit strong radiation. The present invention relates to a semiconductor device that is resistant to radiation and is suitable for use in an environment exposed to IMi.

[Conventional technology]

A semiconductor device subjected to strong radiation M changes its operating state due to the generation of electron/hole pairs.

To minimize changes, use CVi instead of thermal oxide film)
(chemical-vapor depos.
it ion )@mi3j;= for ita eials, special & CB P SG (boro -phospho -
The use of 5ilicate glass) films is effective, and the insulating separation film of conventional radiation-resistant semiconductor devices is the third
As shown in the figure, after forming a thermal oxide film 42 on a semiconductor substrate 41, a BPSG film 43 was formed by CVL method.
The unnecessary parts of the BP8G film 43 were removed by etching.
The structure was made by reflowing.

Further, in order to facilitate the control of all 43 tings of the BP8G film 43 in FIG. 3, a structure as shown in FIG. 4 was also used. To create this structure, a thermal oxide film 52 is formed on a semiconductor substrate 51, a polycrystalline silicon film 53 is laminated, and a BPSG 954 is further formed. Next 1c, 13PS
The unnecessary portion of the G film 54 is etched until the polycrystalline silicon film 53 is exposed. At this time, the polycrystalline silicon film 53 acts as an etching stopper, so that it is possible to prevent etching residue and damage to the semiconductor substrate surface. It becomes possible. After etching the BP 5GpIA 54, the polycrystalline silicon film 53 is removed by isotropic etching, and B) '8G
An insulating isolation film is obtained by reflowing the film 54 at a high temperature.

[Problem that the invention seeks to solve]

The structure of the insulating separation film of the conventional semiconductor device described above minimizes the effects of radiation by using a B)'SG film, which has excellent radiation resistance, in place of a thin thermal oxide film on the semiconductor substrate. Therefore, since it is necessary to make the thermal oxide film on the semiconductor substrate as thin as possible, it is possible to suppress the diffusion of impurities such as phosphorus and boron from the BPSG film during heat treatment. diffuses into the semiconductor substrate, loses its effectiveness as an insulating separation film, and causes M(JS
) There are drawbacks such as fluctuations in the threshold voltage of the transistor.

In contrast to the conventional semiconductor device described above, the present invention reduces the overall size of the semiconductor device by thinning the thermal oxide film on the semiconductor substrate. Although the BPSG film is inferior, thermal oxidation is 1iar.
：It is possible to prevent the diffusion of impurities into the conductor substrate that occurs during high-temperature reflow of the BPSG film for insulation isolation by laminating the dredged CVD oxide film. has.

[Means for solving problems]

The semiconductor device of the present invention includes a thermal oxide film and a CV film on a semiconductor substrate.
It is formed by forming an insulating separation film that covers three layers: a D oxide film and a BF2 (J film).

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 (Al is a longitudinal cross-sectional view of the first embodiment of the present invention. In the figure, 1 is a semi-solid substrate, and 2 is a silicon oxide M formed by a thermal oxidation method (hereinafter referred to as a thermal oxide film). , 3 is a silicon oxide film (hereinafter referred to as CVL) formed by the CVD method.
) oxide film), 4 is a BF formed by CVD method.
50 film, 6 is polycrystalline silicon film for gate, 7 and 8 are P
Source region 2 and drain region formed by diffusing impurities of type %L<, 9 are silicon oxide films, etc., and 10 is for electrodes formed at the contact part of the source/drain Φ gate. The W4 film 11 is a protective film on the surface of the semiconductor device formed of a PSG film.

Next, the embodiment shown in FIG. 1(a) will be explained in detail based on the manufacturing method, with reference to FIGS.

In FIG. 1(b), a thermal oxide film 2 is provided on one surface of a semiconductor substrate 1 to a thickness of 50 to 300 A by a thermal oxidation method, and then CVI)
CVD acid (tJK 3k 500~
The process is shown in which a BP8G film 4 is formed to a thickness of 1,500× and a thickness of 3,000 to 6,000 Å is laminated by a CVD method, and then a photosensitive resin 5 is applied by a spinner method or the like.

Next, the BP8G film 4 and the CVD oxide film 3 are removed using the photosensitive resin 5 with a portion corresponding to the P33 delamination region left as a mask.
Fig. 1(C) shows a process S for removing the etching by etching. At this time, the CVD oxide film 3 remaining after etching is made thick enough to prevent impurity diffusion that occurs during high-temperature reflow of the BPSu film 4 together with the thermal oxide film 2.
VL) Adjust the amount of etching of the oxide film 3.

In FIG. 1 (dl), after removing the photosensitive resin 5 for the mask, the J:1 PSG film 4 is heat-treated at a high temperature (70-), and this patterned BPSG film 4 is used as a mask to perform CV
A step of etching away the D oxide film 3 and the thermal oxide film 2 until the surface of the semiconductor substrate 1 is exposed is shown.

Next, after silicon oxide M, which will become a gate oxide film, is formed by thermal oxidation, a polycrystalline silicon film 6 for the gate is formed (FIG. 1(C)).

1), after removing unnecessary parts of the polycrystalline silicon film 6 for the gate by etching using a photosensitive resin, the source region 7 and drain region 8 are formed by diffusing P-type or N-type impurities. The process of forming is shown.

Next, an insulating film 9 such as a silicon oxide film is formed by the CVIJ method, and the contact portions of the source, drain, and gate are removed by etching using a photosensitive resin mask (the first
Figure (g)).

Next, the formation and patterning of the metal film 10 for the electrode are performed by a known method, and the protective film 11 is formed on the surface, thereby obtaining the embodiment shown in FIG. 1 (al).

The second example (al) is a vertical cross-sectional view of the second embodiment of the invention. In the figure, 21 is a semiconductor substrate, 22 is a thermal oxide film,
23 is a CVD oxide film, 24 is polycrystalline silicon used as a stopper when etching the BP8G film: 7M% 25
27 is a polycrystalline silicon film for gates, 28-29 are source and drain regions, 30 is an insulating film such as a silicon oxide film, 31 is a BPSG film formed by the CVD method;
is formed at the source/drain-gate contact area! The electrode gold PA film 32 is a surface protective film.

Next, the embodiment shown in FIG. 2 (al) will be explained in detail by the manufacturing method with reference to FIGS. 2(b) to ←).

FIG. 2 (bl) shows a thermal oxide film 22 and a CVD film formed on a semiconductor substrate 21 as in the embodiment shown in FIG.
After forming the oxide film 23, the polycrystalline silicon film 24 is
A BPSG film 25 is formed to have a thickness of 0 to 2000X.
The process of applying photosensitive resin 26 after all 25 is shown.

FIG. 2fc) shows the step of etching the BPSO film 25 at step 1 in which the entire 25-crystalline silicon gland 24 is exposed using the photosensitive resin 26 as a mask, leaving a portion corresponding to the insulation isolation region. At this time, since there is a polycrystalline silicon film 24 under the BPSGi 25 that should act as an etching stopper,
B)' Etching of the SG film 25 can be easily performed without causing damage to the base substrate, which is a problem in the above-mentioned embodiments.

Next, after removing the polycrystalline silicon film 24 by isotropic etching, the process of removing the photosensitive resin 26 is shown in FIG.
show.

FIG. 2(e) After reflowing the Ic%BPSG film 25 using a high-temperature film process, the patterned hlPsG film 2
5 as a mask, the CVD oxide film 23 and the thermal oxide film 22 are etched away until the surface of the semiconductor substrate 210 is exposed.

Next, the embodiment shown in FIG. 2(a) is obtained by forming the polycrystalline silicon film 27 for the gate, the metal film 31 for the electrode, etc. in the same manner as in the embodiment shown in FIG. 1(a). It will be done.

〔Effect of the invention〕

As explained above, the present invention improves the radiation resistance of a semiconductor device by forming a Shunk CVD oxide film with a thin thermal oxide group formed on the semiconductor substrate in the insulation isolation region, and further laminating a J:IPSG film. B for insulation separation while holding the
This has the effect of preventing impurity diffusion that occurs when the PSG film is heated to a high temperature from reaching the substrate.

[Brief explanation of the drawing]

FIG. 1(a) is a vertical cross-sectional view of the first embodiment of the present invention.
Figures (bl ~ (gl are sectional views showing the manufacturing process of the embodiment shown in Figure 1 (a), Figure 2 (a) are longitudinal sectional views of the second embodiment of the present invention, Figure 2 fbl ~ (El is a cross-sectional view showing the manufacturing process of the embodiment shown in Figure 2 (at), and Figures 3 and 4 are cross-sectional views of two examples of conventional semiconductor devices. 1.21... ...Semiconductor substrate, 2.22...
・Thermal oxidation group, 3.23...CVD oxide film, 4.
25...BP S (j membrane, 6-24-27...
...Polycrystalline silicon film, 7.28...Source region, 8.29...Drain region, 9.30
...Insulating film, 10.31... Electrode deposit M film. Iya Gonin - #Shin-μ Inside 1 Haku Susumu (ct Fuki l Kunii 11 C-1) clノ$lrgJ (1!i-nhua 2 Figure (Q) Kaya 2 Figure

Claims (1)

[Scope of Claims] A semiconductor device comprising an insulating isolation film having three layers of a thermal oxide film, a CVD oxide film, and a BPSG film on a semiconductor substrate.