JPS6389962A - Method and device for assigning processor - Google Patents

Abstract

PURPOSE:To perform the procedure call of a processor on the other side at high speed, and to contrive to improve the availability of the processor, by switching the call system of the processor according to the state of the processor, in an asymmetric multiprocessor. CONSTITUTION:When the multiprocessor executes the instruction of a main routine in a main memory device 1 by a main processor A100 in a separation mode, and if another processor procedure is called by an instruction call, a signal line 154 from an instruction control circuit 103 goes to '1'. The value of a mode register 3 is '1' because a mode is the separation mode, and a signal line 150 goes to '1'. Therefore, the output 155 of an AND gate 104 goes to '1', and an interruption generation circuit 106 is started up, and an interruption signal 157 goes to '1', then, interruption is generated. As a result, control is delivered to an operating system in the main memory 1, and a process state table is rewritten, and a process assigning request is performed. And processor assignment on a subroutine that is the another processor procedure, is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an asymmetric multiprocessor consisting of a plurality of processors with different functions, and in particular to a process allocation method and process suitable for speeding up processing and improving processor utilization. Regarding equipment.

[Conventional technology]

2. Description of the Related Art In order to improve the processing capacity of data processing devices, a method has been adopted in which a plurality of processors with different functions are combined. For example, a method is used to improve the overall system capacity by combining a general-purpose computer and an array processor, using the general-purpose computer for normal processing and using the array processor for processing high-speed scientific and technical operations. . At this time, when one processor calls a procedure of another processor,
There are at least two types. One is (a) Unexamined Japanese Patent Publication No. 6
As described in No. 0-217451, when a procedure to be executed by the other processor is called, it is called by an interrupt. In this method, the operating system is controlled by interrupts.

1 allocate separate processes to both processors to call the procedure on the other processor.
An advantage is that it is possible to run two processors at the same time. However, since the procedure is called by an interrupt, the procedure call speed becomes longer. The other type is (b) a type in which the procedure of the other processor is called without causing an interrupt. This method has the advantage that the procedure can be called quickly because the procedure is called directly. However, since a direct procedure call is made, the other processor must be in a waiting state so that it can be called at any time, which has the disadvantage of lowering the processor's operating rate.

[Problems to be Solved by the Invention] The above-mentioned conventional technology does not take into account the need to balance the high speed of procedure calls of the other processor with the utilization rate of the processor. There was a problem that the amount was low.

SUMMARY OF THE INVENTION An object of the present invention is to make it possible to call a procedure of another processor at high speed and to improve the operating rate of the processor.

[Means for solving problems]

1. The above object is to provide a means for storing the internal state of each processor and the state of how the process uses the processor in an asymmetric multiprocessor, and a means for allocating only the processors necessary to the process according to the state of the process. This is achieved by providing

2. The above object is achieved by providing means for generating a control signal for determining whether or not to generate an interrupt signal based on the internal state of each processor and the means for calling other processors.

[Effect]

1. The operating system can allocate only the necessary processors by using the internal state of each processor and the state of which processor the process uses. This speeds up calling procedures from other processors, and can improve the operating rate.
'2. When a process calls another processor using the means for calling another processor, if the called processor is not assigned to the process, an interrupt occurs when the means for calling the other processor is executed, and the operating system changes the state of this process and reassigns the process to a processor.

〔Example〕

Hereinafter, one embodiment of the present invention will be described in FIG. 1, FIG. 2, FIG. 3A,
This will be explained with reference to FIGS. 3B and 3C.゛Figure 1 is a block diagram of this embodiment. In this embodiment, a main memory device 1 that is shared by two processors, a system control device 2 that controls the processor and the main memory device, and a system control device 2 that maintains a state in which the two processors operate as one but separately. mode register 3. Main memory controller 4. Main processor A, which is one processor of the asymmetric tightly coupled multiprocessor
100, the other processor, main processor B2
00, general-purpose register group 101, 201, address register 102, 202 that holds the branch destination address, instruction control circuit 103, 203, which controls execution of instructions by instruction code and external signals, AND gates 104, 105
, 204, 205, interrupt generation circuit 106, 206,
NOT gate 107.207, signal line 150.250 from mode register 3, signal line 151, 251 from instruction control circuit 103, 203 to mode register 3, instruction control circuit 103, 2 from address register 102, 202
Data lines 152, 153, which send the branch destination address to 03,
252, 253, signal lines 154, 155 for controlling calls to other processor procedures 156.254, 255, 2
56, and signal lines 157 and 257 for notifying the occurrence of an interrupt.

The asymmetric tightly coupled multiprocessor of this embodiment has a main processor A that has different instruction systems and the same address system.
It consists of two processors: a main processor B 100 and a main processor B 200. In this embodiment, an asymmetric tightly coupled multiprocessor.

There is an integrated mode in which the two main processors are integrated and one process is assigned two processors at the same time, and an isolated mode in which the two main processors are separated and each main processor is assigned a separate process. These two states are held in the mode register 3. When operating in separate mode, the value of mode register 3 is 1, and when operating in integrated mode, the value of mode register 3 is O.

FIG. 2 shows the internal configuration of the main memory. Process A30
0 represents the case of calling another processor procedure when the multiprocessor is in integrated mode, and process B4O0 is
This shows the case of calling another processor procedure when the multiprocessor is in isolation mode. Main routine 30
1,401 runs on the main processor A100, subroutines 302 and 402 run on the main processor B200,
Call instructions 303 and 403 represent instructions for calling procedures of other processors, and return instructions 304 and 404
represents a return instruction from another processor procedure call. The operating system 500 processes when an interrupt occurs in calling another processor procedure, makes a process allocation request 501, transfers control to a process allocation routine 600, executes a process allocation instruction 601, and calls another processor procedure. Allocates a processor to and starts other processor procedures.

The process state table 700 stores the state of which processor executes a process. Figure 3A,
FIG. 3B and FIG. 3C show the process allocation method in this embodiment.

Next, the operation of this embodiment will be explained as shown in Figs. 1, 2, 3A, and 3.
This will be explained using FIG. B and FIG. 3C.

Each process in this embodiment holds one of three types of states in the process state table 700: execution on main processor A 100, execution on main processor B 200, and execution on both processors. This state first uses the state of the load module, and then uses statistics on which processor the process used in the past 10,000 instructions.
If there are 100 instructions, it will run on the main processor A100, if all instructions are from the main processor B200, it will run on the main processor B200, otherwise, both processors will run, and the process state will be loaded by the operating system. It is dynamically changed by rewriting the module and process state table 700. The process allocation method is as follows: (1) If the process is running on one main processor, and the two main processors are in integrated mode, the multiprocessor mode is set to separate mode and the process is assigned to one main processor. ,
The other main processor is also assigned a process that runs only on that main processor. If the main processor is running separately, a process that runs only on that processor is assigned to the main processor in the 5-waiting state. (2) When a process runs on both main processors, if the multiprocessor is in integrated mode, the process is assigned as is.

If either main processor is running, the process is initially allocated to the main processor in the waiting state if it can be executed, and if it cannot be executed, the process is placed in the waiting main processor. Wait until it becomes available and then assign it. Once the main processor is in standby mode, put the multiprocessors into integrated mode. When a multiprocessor is running separately and another processor procedure call instruction is executed, process B in Figure 2
When an interrupt occurs, such as 4O1, control is transferred to the operating system 500, which makes the process run on both processors and performs process assignment.

Main processor A100 in multiprocessor integrated mode
When executing the instructions of the main routine 301 in c
When the all instruction 303 calls another processor procedure, the signal line 154 from the instruction control circuit 103 becomes 1. The value of the mode register 3 is 0 because it is a negative body mode, and the value of the signal line 150 is 0. NOT gate 10
7, the value of the signal line 150 becomes 1, and the AND gate 105
The input signal lines are both 1, and the signal line 156 is 1.
becomes. As a result, the instruction control circuit 203 is activated and the branch destination address of the address register 102 is set to data line 1.
53, the main processor B200 is notified, and the subroutine 302 is activated. The necessary arguments at this time are transferred by copying the values of the general-purpose register group 101 of the main processor A100 to the general-purpose register group 201 of the main processor B200. Main routine 40 at A100 when multiprocessor is in isolation mode to main processor
When an instruction 1 is being executed and another processor procedure is called by a call instruction 403, the signal line 154 from the instruction control circuit 103 becomes 1.

The value of mode register 3 is for separation mode.

1, and the signal line 150 becomes 1.

The signal enters the AND gate 104, both signal lines become 1, the signal line 155 becomes 1, the interrupt generation circuit 106 is activated, the interrupt signal 157 becomes 1, and an interrupt is generated. When an interrupt occurs, control is transferred to the operating system 500 and the process state table 70 is
Rewrite 0 and issue a process allocation request 501,
Processor allocation for subroutine 402, which is another processor procedure, is performed.

By performing process allocation in this manner, the multiprocessor operates in a separate mode in many cases, and the utilization rate of each processor is improved.

Furthermore, a process that frequently uses other processor procedures can call other processor procedures at high speed by being assigned to a multiprocessor that operates in integrated mode.

〔Effect of the invention〕

According to the present invention, in an asymmetric multiprocessor, the calling method of the processor can be switched depending on the process state, so that in an asymmetric multiprocessor system consisting of n processors with different functions, a process using only one processor can be switched. If there are many processors, the total utilization rate of the processors will be up to n times higher than with the conventional integrated technology.When executing a process that uses multiple processors, the processing speed of other processors will be higher than with the conventional technology of the separate method. The calling speed is determined by the number of instructions executed for interrupt handling.
Then, it becomes about m times faster.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a block diagram of the main memory, and FIGS. 3A, 3B, and 3C are process allocation scheme diagrams. 3...Mode register, 102,202...Address register, 103,203...Instruction control circuit, 10
4゜105.204,205...AND gate, 10
6゜206...Interrupt generation circuit, 150,250゜154.254,155,255,156,256...
・Control signal line, 157, 257... interrupt signal line,
152, 153, 252, 253... Branch destination address data line, 700... Process status table.

Claims (1)

[Claims] 1. In an asymmetric multiprocessor consisting of a plurality of processors with different functions, means for storing the state of which process is being executed by each processor, and the state of which processor is used by the process. means for storing, and means for changing the state of the process according to instructions executed by the process in the past; A process allocation method characterized by allocating. 2. In an asymmetric multiprocessor consisting of a plurality of processors with different functions, means for storing the state of which process is being executed by each processor, means for calling procedures of other processors, and means for a certain process to call procedures of the other processors. When calling another processor by
A processor allocation device comprising means for generating an interrupt when a called processor is not allocated to the process.