JPS6386544A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To easily form an electrode wiring into a multilayered structure by a method wherein the surface of a wiring metal pattern is flattened with an organic film and a dry etching is performed by using O2 plasma until part of a wiring metal film is exposed. CONSTITUTION:A P-type photo resist 4 and an Al or alloy film 3 are deposited on a substrate by the manufacturing method of a MOS or bipolar type semiconductor device. An organic film 11 is applied comparatively thick (about 2-3 mum) by a spin coater to flatten the surface and the surface of the metal film 3 is exposed by an RIE or O2 plasma treatment. An etching is performed on the Al film 3 by an RIE method using chlorine containing gas and thereafter, a chemical dry etching treatment, wherein O2 plasma is used, is performed and the resist 4 and the organic film 11 are simultaneously peeled off. An insulating film 22 is ready-laminated on an insulating film 2 and to perform an RIE etching treatment using Freon gas is also possible.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a method of manufacturing a semiconductor device, and particularly to a method for easily forming multilayer interconnections of a MOS type or bipolar type semiconductor device.

(Prior Art) In the conventional method for forming electrode wiring, as shown in FIG. 3, after forming a MOS type bipolar element on a silicon substrate, an At electrode wiring is formed. In Fig. 3, l is a semiconductor substrate, 2 is a silicon oxide film, 3 is an AtA film deposited, 4 is a photoresist film, 5 is a photomask, 6uA
It's sipes, ng.

That is, in FIG. 3(A), an oxide film 2, an At film 3, and an At film 3 are formed on a substrate 1.
Resist films 4 are sequentially laminated. Next, Figure 3 (B)
As shown in FIG. 3, ultraviolet rays are irradiated using a photomask 5, and development is performed as shown in FIG. 3(C) to form a resist/mother turn. Next, as shown in FIG. 3(D), the Kl film 3 is etched using the resist 4 as a mask to form an At wiring layer, and the resist 4 is peeled off. Thereafter, as shown in FIG. 3, a film 6 is deposited.

By the way, in the conventional manufacturing method, wiring is formed in a convex shape on the surface of the substrate as shown in FIG. 3(b). After that, use plasma 5IO2 film or plasma 815N4 film as an interlayer insulating film in the case of multilayer wiring, SIO□ by CVD method, LPCVD (Low Pre
There are inorganic materials such as 5J02 produced by the ++5ureCVD method.6 Also, as an organic insulating material, polyimide P is laminated.

(Problems to be Solved by the Invention) A particular problem with conventional technology is that with the recent trend toward higher integration, it is difficult to stack electrode wiring in two or three layers to increase the integration density. Some ingenuity is required. At this time, if the surface of the semiconductor substrate on which electrode wiring is formed is severely circumscribed, disconnection development will occur when forming the second layer of electrode wiring, which will impede the formation of multilayer wiring. In conventional technology, the degree of unevenness on the surface of a nine-dimensional board on which electrode wiring is maintained is maintained, and the surface of the board is flattened using various special techniques. Most of these conventional techniques have problems in that the manufacturing process is complex and long, and that special manufacturing equipment is used, resulting in high manufacturing costs.

The present invention was invented to solve such problems, and in carrying out the present invention, a method such as lift-off is utilized, but here, the resist lift-off method of the prior art is used. Let me explain the problems.

The resist coating process as shown in Figure 4 (B), the light irradiation process as shown in Figure 4 (B), the developing process as shown in Figure 4 (Figure 4), Figure 4 @A
In the conventional resist lift-off method, lift-off is performed as shown in FIG. 4(6). The problem here is how to remove the At film 3 deposited on the resist 4 from () in FIG. Immerse it in water, apply ultrasonic treatment to dissolve the Resist, and mechanically remove it using ultrasonic waves? ]
It was there. However, with this method, At
It is necessary that the film 3 and the At film 3 on the insulating film 2 on the semiconductor substrate are completely separated, and if they are not even partially connected, there is a problem that complete lift-off cannot be performed.

The present invention improves the conventional wet lift-off method to provide an electrode wiring method using dry etching (temporarily referred to as dry lift-off method), and uses this technology to easily create multiple layers of electrode wiring. It is something to do.

[Structure of the Invention (Means and Effects for Solving Problems) Conventionally, a wet method has been adopted as a lift-off method, but as mentioned above, there was a problem that complete lift-off could not be performed. . The present invention relates to a method for reducing lift-off to P-ly. According to the method according to the present invention, complete lift-off is achieved and manufacturing costs can be reduced.

The feature of the present invention is that the uneven wiring metal film is flattened with an organic film, and then the wiring metal film is etched nine times using 02 plasma until a part of the wiring metal film is exposed.

(Example) A first example of the present invention will be described below with reference to the drawings. FIG. 1 is a process diagram of the same embodiment, and the same reference numerals are used for parts corresponding to those of the conventional example. First of all, the first
According to the well-known manufacturing method of MOS type or bipolar type semiconductor device as shown in section (4), the first electrode forming step is performed.
Prepare the silicon sea urchin substrate that has been completed up to the previous step. For example, positive type photoresist 4 is applied to this substrate.
0FPR-800 (trade name, manufactured by Tokyo Ohka) was spin-coded and heated on a hot plate at 85°C for 15 minutes to dry the solvent.
Heat treat for minutes. After that, as shown in FIG. 1(B), Gloximity Mask Aligner, PLA-500FA (trade name).

Using a specified photomask 5 (manufactured by Canon Sales Co., Ltd.), the mask is aligned and then UV irradiation is applied. After that, the first
As shown in figure (C), process with a special developer and resist.
form a pattern. After that, as shown in @1 Figure 0), the electrode forming material is pure aluminum or At-81, A
# Deposit alloy 3 such as t-8i-Cu.

In the method according to the present invention from the next step, the steps up to the above are completely the same manufacturing method as the conventional method. In the conventional wet lift-off method, the metal is then lifted off by ultrasonication in an acetone solvent. The dry lift-off according to the present invention will be explained below. Figure 1 ■)
A relatively thick organic film (as shown in
Apply 2 to 3 μm before ff1) to flatten the surface, and expose the surface rIji of metal 3 by 02 reactive ion etching (referred to as RIE) or 02f plasma treatment, as shown in Figure 1 C). let Thereafter, as shown in FIG. 1(G), the At film 3 is etched by the RIE method using chlorine gas, and then a chemical dry etching process using 0□ plasma is performed to remove the resist 4 and the organic film 1. Simultaneous peeling is performed to obtain the structure shown in FIG. 1 (6).

FIG. 2 shows the manufacturing process of an example in which the dry lift-off method according to the present invention is applied. The difference from the first embodiment is that an insulating film (for example, plasma 5102) 2 RI
It is located in the E-etching area. When performing this etching process, the etching should be done to the same depth as the thickness of the At film, which is the electrode wiring material.

This is a feature of the present invention. From FIG. 2(g)) onwards, the same treatment as in the example of FIG. 1 is performed, and the final cross-sectional structure obtained is as shown in FIG. A buried structure is obtained, and the electrode wiring in the second layer and subsequent layers formed thereafter can be easily performed.

[Effects of the Invention] The improvement effects of the lift-off method, which is the 8g1 invention of the present invention, will be explained. In the conventional method (wet lift-off method), in order to perform lift-off completely, it is necessary to completely disconnect the metal present on the resist and the metal present on the insulating film on the semiconductor substrate. There is. For this reason, in the past, a method of overhanging the photoresist cross section or a multilayer resist method was used, but the gloss was complicated and reproducibility was poor, which caused problems in mass production. . That is, in the present invention, there is no need to overhang the cross section of the photoresist, and since the metal is removed by the RIE method, which is a dry etching method, there is an advantage that reproducibility is improved.

According to the second aspect of the present invention, a method for manufacturing a semiconductor device in which electrode wiring is embedded in an insulating film.

The surface is flat, making it very easy to install @pole wiring in the second or third layer, making it possible to achieve high integration of semiconductor devices.
This will greatly contribute to reducing manufacturing costs and increasing added value.

[Brief explanation of the drawing]

Figures 1 and 2 are process diagrams of each embodiment of the present invention, Figure 3,
FIG. 4 is a diagram showing each step of the conventional method. 1...Semiconductor substrate, t for X,)...Insulating film, 22.
...Insulating film. 3... At film, 4... Photoresist film, 5...
Photomask, 6...? Scivation m, 11...
・Organic film. Applicant’s agent Patent attorney Takehiko Suzue＾
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VIA -AtH- One Lift Off- Figure 4

Claims (2)

[Claims] (1) When forming electrode wiring of a semiconductor device, there are a step of forming an insulating film on a semiconductor substrate, a step of applying a photoresist, a step of covering the photoresist film with a photomask and irradiating it with ultraviolet rays, and a step of exposing the photoresist to a photoresist. a step of developing the photoresist film formed by the development, a step of forming a metal film for wiring on the entire surface of the photoresist pattern formed by the development, a step of applying an organic film film on the metal film for wiring, and a step of applying the organic film to the metal film for wiring; A step of exposing a part of the wiring metal film by etching the film film by chemical dry etching using O_2 plasma or reactive ion etching using O_2, and removing the exposed wiring metal film from the film. 1. A method for manufacturing a semiconductor device, comprising the steps of etching by a reactive ion etching method using a gas that corrodes the photoresist film and the organic film. (2) When forming electrode wiring of a semiconductor device, there are a step of forming an insulating film on a semiconductor substrate, a step of applying a photoresist, a step of covering the photoresist film with a photomask and irradiating it with ultraviolet rays, and a step of exposing the photoresist to a photoresist. a step of developing the photoresist film formed by the development, a step of etching the insulating film halfway from the groove formed in the photoresist film by the development, and a step of etching a wiring metal film over the entire surface of the photoresist pattern formed by the development. a step of forming;
The metal film for wiring is coated on the metal film for wiring, and the organic film is etched by chemical dry etching using O_2 plasma or reactive ion etching using O_2. a step of exposing a part of the metal film for wiring; a step of etching the exposed wiring metal film by a reactive ion etching method using a gas that corrodes the film; and a step of removing the photoresist film and the organic film film. A method for manufacturing a semiconductor device, comprising: