JPS6386475A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To reduce the collector resistance by forming a base electrode drawing out layer within a recess formed in the base layer surface and forming a hole section reaching from a predetermined part of the surface of the device region consisting of the respective layers to the collector buried layer, and forming a collector electrode drawing out layer within this hole section. CONSTITUTION:In the surface of a base layer 4, a drawing out layer 9 of polysilicon is formed from the inside of a recess 8 formed in the vicinity of an emitter layer 5 to the electrode drawing out region, and a silicide layer 10 is formed on the surface thereof. On the end of this drawing out layer 9, an electrode 11 is formed. Also, in another part of the base layer 4, a hole section 12 reaching a buried layer 2 through the base layer 4 and a collector layer 3 is provided, and the side wall portion of the hole 12 is covered with an insulating film 13. And a drawing out layer 14 of polysilicon is formed from the inside of the hole section 12 to the electrode drawing out region, and a silicide layer 10 is formed on the surface thereof. On the end of this drawing layer 14, an electrode 15 is formed. With this, the base resistance can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor integrated circuit device, and particularly to a Brainer transistor.

[Prior Art] As shown in FIG. 2, in a conventional Brehner transistor, a collector buried layer 2 is formed by ion-implanting a second conductivity type M-type impurity into a first conductivity type silicon substrate 1. A collector layer 3 is formed thereon by epitaxial growth. A collector all 2a is formed in a predetermined region above the collector buried layer 2 by ion-implanting highly concentrated impurities of the second conductivity type. Further, a base layer 4 is formed on the surface of the collector layer 3 by diffusion of impurities of a first conductivity type, and an emitter layer 5 is formed in a predetermined region of the surface of the base layer 4 by diffusion of impurities of a second conductivity type. has been done. The device region formed from these layers is separated from other regions by a field oxide film 6. The surface of this element region is covered with an insulating film 7. A base electrode 11, a collector electrode 15, and an emitter electrode 16 are formed at predetermined locations on the insulating film 7, and the base layer 4, the emitter electrode 16, and the emitter electrode 16 are formed at predetermined locations on the insulating film 7 through contact holes provided in the insulating film 7, respectively, through the silicide layer 10. It is connected to collector all 2a and emitter layer 5.

[Problems to be Solved by the Invention] As described above, in the conventional brainer transistor, the base electrode and the emitter electrode are formed on the same plane, and there is a margin for separating the base electrode and the emitter electrode. Therefore, it is not possible to form the contact part between the base layer and the base electrode (base contact part) and the contact part between the emitter layer and the emitter electrode (emitter contact part) close to each other, which makes the base resistance too small. I couldn't. Furthermore, since the base contact portion and the emitter contact portion are on the same plane, base current is concentrated at the emitter side end of the base contact portion, increasing contact resistance. moreover,
Regarding the contact between the collector and the collector electrode, in order to reduce the resistance between the collector buried layer and the collector electrode,
It is necessary to form a collector all by ion-implanting impurities at a high concentration, which poses problems such as an increase in the number of steps.

This invention was made to solve the above-mentioned problems, and it is possible to reduce the base resistance by reducing the distance between the base contact part and the emitter contact part, and also to make it possible to reduce the base resistance evenly in the base contact part. It is an object of the present invention to provide a semiconductor integrated circuit device that can reduce contact resistance by flowing a base current and can also reduce collector resistance without using a collector all.

[Means for Solving the Problems] The present invention forms a collector buried layer of a second conductivity type in a semiconductor substrate of a first conductivity type, and has a collector layer, a base layer of a first conductivity type, a base layer of a first conductivity type, and a collector buried layer of a second conductivity type on a semiconductor substrate of a first conductivity type. In a semiconductor integrated circuit device in which a two-conductivity type emitter layer is formed, a recess is formed on the surface of the base layer, a base electrode extraction layer is formed inside the recess, and a predetermined location on the surface of the element region made of each of the layers is formed. A hole is formed to reach the collector buried layer, and a collector electrode lead layer is formed inside the hole.

[Function] In the semiconductor integrated circuit device according to the present invention, since the base electrode extraction layer is formed inside the recess on the surface of the base layer, the base contact portion, which is the contact portion between the base layer and the base electrode, is formed on the side wall of the recess. Becomes a department. Therefore, by forming the recess near the emitter contact portion, which is the contact portion between the emitter layer and the emitter electrode, the distance between the base contact portion and the emitter contact portion can be reduced. At this time, since the base contact portion and the emitter contact portion are not on the same plane, there is no need to separate the base contact portion and the emitter contact portion by providing a margin for separating the base electrode and the emitter electrode. Further, since the base contact portion becomes the side wall portion of the recess, the base current flows uniformly almost perpendicularly to the base contact portion.

Further, contact between the collector and the collector electrode is made directly from the collector buried layer to the collector electrode extraction layer through the hole.

【Example] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing a Brainer transistor which is an embodiment of the present invention. This brainer transistor is
A collector buried layer 2 is formed by ion-implanting impurities of a second conductivity type into a silicon substrate 1 of a first conductivity type, and a collector layer 3 is formed on top of the buried layer 2 by epitaxial growth.
is formed. A base layer 4 is formed on the surface of the collector layer 3 by diffusion of impurities of a first conductivity type, and an emitter layer 5 is formed in a predetermined region of the surface of the base layer 4 by diffusion of impurities of a second conductivity type. has been done.

The device region formed from these layers is separated from other regions by a field oxide film 6. Further, the surface of this element region is covered with an insulating film 7.

A recess 8 is formed on the surface of the base layer 4 near the emitter layer 5.
is formed. A base electrode extraction layer 9 made of polysilicon is formed from the inside of the recess 8 to the electrode extraction region, and a silicide layer 10 of TiSi2, WSi2, etc. is formed on the surface thereof. A base electrode 11 made of aluminum or the like is formed at the end of the base electrode extraction layer 9. In addition, a hole 12 that penetrates the base layer 4 and the collector layer 3 and reaches the collector buried layer 2 is provided in another part of the base layer 4, and the side wall of the hole 12 is covered with an insulating film. It is covered with 13. A collector electrode lead layer 14 made of polysilicon is formed from the inside of the hole 12 to the electrode lead region, and a silicide layer 10 is formed on the surface thereof. A collector electrode 15 made of aluminum or the like is formed at the end of the collector electrode lead layer 14.

The base electrode extraction layer 9 and the collector electrode extraction layer 14
is formed as follows. First, a polysilicon layer is deposited on the surface of the element region, and a photoresist film is formed on the electrode lead region. Next, when this polysilicon layer is anisotropically etched, the polysilicon layer in other areas is removed except for the sidewalls of the recess 8, the sidewalls of the hole 12, and the electrode lead-out area, and the base electrode lead-out layer 9 and the other areas of the polysilicon layer are removed. A collector electrode extraction layer 14 will be formed.

An emitter electrode 16 made of aluminum or the like is formed at a predetermined location on the insulating film 7 on the surface of the emitter layer 5, and the emitter electrode 16 is connected through a contact hole provided in the insulating film 7 through the silicide layer 10. It is connected to the emitter layer 5.

In this embodiment, the base electrode lead layer 9 and the collector electrode lead layer 14 have a two-layer structure of polysilicon and silicide, but these portions may be formed of molybdenum silicide.

[Effects of the Invention] As described above, according to the semiconductor integrated circuit device of the present invention,
Since the contact portion between the base layer and the base electrode is located on the side wall of the recess, the distance between the base contact portion and the emitter contact portion can be reduced, thereby reducing the base resistance. Furthermore, since the base current flows uniformly through the base contact portion, the contact resistance is reduced. Furthermore, since the collector contact is made directly from the collector buried layer through the hole, the collector resistance is reduced and the step of forming the collector all can be omitted.

Therefore, it becomes possible to construct a high-speed and highly integrated semiconductor integrated circuit.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing an embodiment of a semiconductor integrated circuit device of the present invention, and FIG. 2 is a sectional view showing a conventional semiconductor integrated circuit device. In the figure, 1 is a silicon substrate, 2 is a collector buried layer,
3 is a collector layer, 4 is a base layer, 5 is an emitter layer, 8 is a recess, 9 is a base electrode extension layer, 12 is a hole, and 14 is a collector electrode extension layer. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (4)

[Claims] (1) a first conductivity type semiconductor substrate; a second conductivity type collector buried layer formed on the first conductivity type semiconductor substrate;
a collector layer formed on the collector buried layer;
a base layer of a first conductivity type formed on the top of the collector layer; an emitter layer of a second conductivity type formed in a predetermined region of the surface of the base layer; and an emitter layer of a second conductivity type formed in another region of the surface of the base layer. a recess, a hole formed to reach the collector buried layer from a predetermined location on the surface of the element region made up of the respective layers, a base electrode extraction layer formed inside the recess, and a hole inside the hole. A semiconductor integrated circuit device comprising a collector electrode lead layer formed thereon. (2) The semiconductor integrated circuit device according to claim 1, wherein the base electrode lead layer and the collector electrode lead layer are formed of polysilicon. (3) The semiconductor integrated circuit device according to claim 1, wherein the base electrode lead layer and the collector electrode lead layer are formed in a two-layer structure of polysilicon and silicide. (4) The semiconductor integrated circuit device according to claim 1, wherein the base electrode lead layer and the collector electrode lead layer are formed of molybdenum silicide.