JPS6380412A - Cu based substrate for electric circuit board and manufacture thereof - Google Patents

Cu based substrate for electric circuit board and manufacture thereof

Info

Publication number
JPS6380412A
JPS6380412A JP22519386A JP22519386A JPS6380412A JP S6380412 A JPS6380412 A JP S6380412A JP 22519386 A JP22519386 A JP 22519386A JP 22519386 A JP22519386 A JP 22519386A JP S6380412 A JPS6380412 A JP S6380412A
Authority
JP
Japan
Prior art keywords
base material
circuit board
alloy
electric circuit
alloy layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22519386A
Other languages
Japanese (ja)
Inventor
志賀 章二
佐藤 矩正
白川 亮偕
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Furukawa Electric Co Ltd
Original Assignee
Furukawa Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Furukawa Electric Co Ltd filed Critical Furukawa Electric Co Ltd
Priority to JP22519386A priority Critical patent/JPS6380412A/en
Publication of JPS6380412A publication Critical patent/JPS6380412A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電気回路板に用いる導電回路用Cu系基材、特
にプリント回路、テープキャリヤーや配線回路用ブスバ
ー等に用いるCu系基材に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a Cu-based substrate for conductive circuits used in electric circuit boards, and particularly to a Cu-based substrate used for printed circuits, tape carriers, busbars for wired circuits, etc. It is.

〔従来の技術〕[Conventional technology]

近年エレクトロニクス分野で需要が増大しているプリン
ト回路には厚さ7〜70μm位のCu箔が多量に使用さ
れている。上記Cu箔として、電解Cu箔の他に、表面
品質等が優れた圧延Cu箔も最近は使用されており、こ
れらCu箔は絶縁板の片面或いは両面に接着された後、
エツチングにより所望の回路に形成されている。而して
前記圧延Cu箔としては、純Cuの箔の他に耐熱性を向
上させるために、導電率を低下させない範囲でAg、 
 P%Fe、Cd等を添加したCu合金の箔も使用され
ている。
A large amount of Cu foil with a thickness of about 7 to 70 μm is used in printed circuits, which have been in increasing demand in the electronics field in recent years. In addition to electrolytic Cu foil, rolled Cu foil with excellent surface quality has recently been used as the above-mentioned Cu foil. After these Cu foils are bonded to one or both sides of an insulating plate,
A desired circuit is formed by etching. In addition to the pure Cu foil, the rolled Cu foil may also contain Ag, Ag, or Ag to improve heat resistance within a range that does not reduce the electrical conductivity.
A Cu alloy foil to which P%Fe, Cd, etc. are added is also used.

前記プリント回路板としては、リジット基板の他にフレ
キシブル基板も多量に使用されており、フレキシブル回
路板の一種として、半導体チノプ実装のテープキャリヤ
ー、TAB (Tape −AutomatedBon
ding )テープ等が使用されている。
In addition to rigid boards, flexible boards are also widely used as printed circuit boards, and one type of flexible circuit board is a tape carrier for semiconductor chip mounting, TAB (Tape-AutomatedBon).
ding) tape etc. are used.

又自動車や各種機器内配線に用いられるヒユーズボック
ス、ジヨイントボックスでは、Cu又はCu合金板を打
抜き等で成型したブスバー状回路が絶縁板を介して多層
に配線されている。これは回路の巾や厚さは前記プリン
ト回路の場合よりも大きいが、電気回路板としては類似
の構造と見なすことが出来る。
Further, in fuse boxes and joint boxes used for wiring inside automobiles and various devices, busbar-shaped circuits formed by punching or the like from Cu or Cu alloy plates are wired in multiple layers via insulating plates. Although the width and thickness of this circuit are larger than those of the printed circuit, it can be considered to have a similar structure as an electric circuit board.

最近、電子機器の小型高密度化と多機能化に伴なって、
前記電気回路板の高密度化が強く求められており、更に
プリント回路板では、小型チップ部品を高密度に実装出
来る面実装が広く採用される方向にある。
Recently, as electronic devices have become smaller, more dense, and more multifunctional,
There is a strong demand for higher density electrical circuit boards, and surface mounting, which allows small chip components to be mounted at high density, is becoming more widely used in printed circuit boards.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

前述のプリント回路板等回路板の高密度化に伴ない、導
体間の間隙である回路スペースは05〜“F O805■又はそれ以上になっており、特に多層プリン
ト回路板やテープキャリヤーにおいてその傾向が著しい
With the increase in the density of circuit boards such as the aforementioned printed circuit boards, the circuit space, which is the gap between conductors, has become 05 to 805 cm or more, and this trend is particularly noticeable in multilayer printed circuit boards and tape carriers. is remarkable.

この様に回路スペースが縮少されると、Cuのマイグレ
ーション(カソード側からアノードに向って起るデンド
ライト成長)が起りやすくなり、絶縁性の低下、リーク
電流の発生、短絡等の原因となる。即ち、前記マイグレ
ーションは外気中の水分や汚染物質等環境条件にも依存
するが、主に回路内の電位差に起因するものであるので
、高密度化と共に該マイグレーションが起りやすくなる
When the circuit space is reduced in this way, Cu migration (dendritic growth occurring from the cathode side toward the anode) tends to occur, which causes a decrease in insulation, generation of leakage current, short circuit, etc. That is, although the migration depends on environmental conditions such as moisture and contaminants in the outside air, it is mainly caused by the potential difference within the circuit, and thus migration becomes more likely to occur as the density increases.

回路板の高密度化に伴なうもう一つの問題点は半田接合
強度の低下である。即ち、高密度化に伴なって半田接合
面積が減少し、上記接合強度の低下を生じるが、従来の
穴実装に代って広く採用されている面実装において特に
この傾向が甚しい。
Another problem associated with higher density circuit boards is a decrease in solder joint strength. That is, as the density increases, the solder joint area decreases, resulting in a decrease in the above-mentioned joint strength, and this tendency is particularly severe in surface mounting, which has been widely adopted as an alternative to conventional hole mounting.

又Cuと半田(Sn −Pb合金)は経時的に拡散反応
してCu −Snの脆い金属間化合物相が発生し、従っ
て接合強度が低下する。
Further, Cu and solder (Sn--Pb alloy) undergo a diffusion reaction over time to generate a brittle intermetallic compound phase of Cu--Sn, thereby reducing the bonding strength.

以上の問題点は電子機器の信頼性に重大な影響を及ぼす
ものであり、これらを解消し得る回路板用へ系基材の開
発が強く求められている。
The above-mentioned problems have a serious effect on the reliability of electronic equipment, and there is a strong demand for the development of base materials for circuit boards that can solve these problems.

〔問題点を解決するための手段〕[Means for solving problems]

本発明はこの様な問題点を解決するため自鋭意研究の結
果得られたものであり、Cu系基材表面の少く共一部に
Zn又はZn合金層を設けたことを特徴とする電気回路
用Cu系基材並びに上記Cu系基材を加熱拡散処理する
ことを特徴とする電気回路板用Cu系基材の製造方法で
ある。
The present invention was obtained as a result of intensive research to solve these problems, and provides an electric circuit characterized in that a Zn or Zn alloy layer is provided on a small portion of the surface of a Cu base material. This is a method for producing a Cu-based substrate for an electric circuit board, characterized in that the Cu-based substrate for use as well as the Cu-based substrate described above is subjected to a heat-diffusion treatment.

〔作 用〕[For production]

本発明によるCu系基材は、表面の少く共一部に高濃度
のZnを含有することにより、高い導電性を保持すると
共に、従来のCu系基材で問題となっていた諸特性を改
善することが可能である。
The Cu-based base material according to the present invention maintains high conductivity by containing a high concentration of Zn in a small portion of the surface, and improves various properties that were problematic with conventional Cu-based base materials. It is possible to do so.

即ちZnはCuよりも卑な金属であり、かつ拡散性に富
むことが、従来のCu系基材が有していた問題点を解消
させるのであると考えられる。まずCuのマイグレーシ
ョンに関しては、上記現象はCuのアノード溶出、イオ
ン泳動、カンード析出から成る電気化学的現象であり、
ZnはCuのアノード溶出を抑止するのに有効である。
That is, it is thought that Zn is a metal less noble than Cu and has high diffusivity, which solves the problems that conventional Cu-based base materials have. First, regarding Cu migration, the above phenomenon is an electrochemical phenomenon consisting of Cu anodic elution, iontophoresis, and cand precipitation.
Zn is effective in suppressing anode elution of Cu.

又Znの共存は、半田界面における拡散反応による脆化
層発生を抑止するのに有効である。
Further, the coexistence of Zn is effective in suppressing the formation of a brittle layer due to diffusion reaction at the solder interface.

本発明においてZn又はZn合金層はCu系基材表面の
少くとも一部にあることが必要であり、箔の場合は少く
共片面(プリント回路板の場合、その表面に露出する側
)にあることが必要である。
In the present invention, the Zn or Zn alloy layer must be present on at least a part of the surface of the Cu base material, and in the case of foil, it must be present on at least one side (in the case of a printed circuit board, the side exposed to the surface). It is necessary.

本発明におけるCu系基材は、純Cuの他、Cu −A
g。
In addition to pure Cu, the Cu-based base material in the present invention includes Cu-A
g.

Cu −P、 Cu−Fe、 Cu−Mg、 Cu−T
h、 Cu−Zr等のCu合金であり、Zn又はZ給金
層はZn、Cu−Znの他、Cu −Zn−3n、  
Zn−8n、 Zn−N1、Zn −Ag%Zn −C
d1Zn−Cd−Cu等である。これらのZn又はZn
合金層の厚さは0.1〜10μmであることが好ましく
、特に望ましいZn又はZn合金層はZn量1〜60%
のCu上記特に望ましいZn又はZn合金層は、表面に
Zn又はZn合金層を有するCu系基材の表面の少くと
も一部にZn又はZn合金層を設け、該基材を加熱拡散
処理することにより、Znを拡散させることによって得
ることが出来る。又加熱拡散処理の前後に圧延等の加工
を施して、表面を平滑にかつ所望の寸法に仕上げること
が可能である。尚このZn又はZn合金層の形成方法は
任意であり、メッキ、蒸着、スパッタリング、溶射、ク
ラッド、複合鋳造等の内いずれを用いても差しつかえな
い。
Cu-P, Cu-Fe, Cu-Mg, Cu-T
h, is a Cu alloy such as Cu-Zr, and the Zn or Z feeding layer is not only Zn and Cu-Zn but also Cu-Zn-3n,
Zn-8n, Zn-N1, Zn-Ag%Zn-C
d1Zn-Cd-Cu, etc. These Zn or Zn
The thickness of the alloy layer is preferably 0.1 to 10 μm, and a particularly desirable Zn or Zn alloy layer has a Zn content of 1 to 60%.
The above particularly desirable Zn or Zn alloy layer is obtained by providing a Zn or Zn alloy layer on at least a part of the surface of a Cu base material having a Zn or Zn alloy layer on the surface, and subjecting the base material to a heat diffusion treatment. It can be obtained by diffusing Zn. In addition, it is possible to perform processing such as rolling before and after the heat diffusion treatment to make the surface smooth and to have desired dimensions. The method for forming this Zn or Zn alloy layer is arbitrary, and any of plating, vapor deposition, sputtering, thermal spraying, cladding, composite casting, etc. may be used.

次に本発明における特許請求の範囲第2項乃至第4項の
限定理由について説明する。第1に、表面のZn又はZ
n合金層の厚さは0.1〜10μmであることが好まし
いが、その理由はα1μm未満では前記Znの効果が実
用上得難く、他方10μmを超えると、用途や寸法にも
よるが、導電性が低下するので実用性に劣る場合がある
ためである。
Next, the reasons for limitations in claims 2 to 4 of the present invention will be explained. First, Zn or Z on the surface
The thickness of the n-alloy layer is preferably 0.1 to 10 μm. The reason for this is that if α is less than 1 μm, it is difficult to obtain the above-mentioned Zn effect in practice, and if it exceeds 10 μm, the conductivity may be poor, although it depends on the application and dimensions. This is because the performance may be lowered and the practicality may be lower.

第2に、前記Zn又はZn合金としては、Zn量1〜6
0%のCu−Zn合金が最も有用であるのは下記の理由
による。(1)純Zni腐食しやすく、半田濡れ性に劣
り、プリント回路板の実装作業上不利である。
Second, the Zn or Zn alloy has a Zn content of 1 to 6
The reason why 0% Cu-Zn alloy is most useful is as follows. (1) Pure Zni is easily corroded and has poor solder wettability, which is disadvantageous for mounting work on printed circuit boards.

(2)基材の特性、生産性、経済性等を考慮するとZn
合金としてはOu −Zn合金が最も有用である。又上
記Cu−Zn合金はCuよりも酸化し難いので、加熱工
程の酸化変色が少ない点も有利である。(3) Cu 
−Zn合金において、訃量1%未満では前記Znの効果
が得難く、Zniが60%を超えると前記半田濡れ性が
劣下する。
(2) Considering the characteristics of the base material, productivity, economic efficiency, etc.
The most useful alloy is Ou-Zn alloy. Furthermore, since the Cu--Zn alloy is more difficult to oxidize than Cu, it is also advantageous in that there is less oxidative discoloration during the heating process. (3) Cu
- In the Zn alloy, if the amount of Zn is less than 1%, it is difficult to obtain the effect of Zn, and if the amount of Zni exceeds 60%, the solder wettability is deteriorated.

第3に、本発明において、Zn量が表面から内部に向っ
て減少する濃度分布を有するCu −Zn合金層が特に
望ましいのは下記の理由による。(1)少量のZn、従
って導電性の低下を最小にして本発明の効果を最大に発
現出来る。(2)少量のZnを能率的に被覆して、Cu
中に拡散させることにより製造できるので、生産性にも
優れている。(3) Zn濃度が高い表面側が卑である
ので、腐食が平均的に進行し、マイグレーション防止に
特に有効である。
Thirdly, in the present invention, a Cu--Zn alloy layer having a concentration distribution in which the amount of Zn decreases from the surface toward the inside is particularly desirable for the following reason. (1) The effect of the present invention can be maximized with a small amount of Zn, thus minimizing the decrease in conductivity. (2) Efficiently coating a small amount of Zn to coat Cu
Since it can be manufactured by diffusing it into the inside, it is also excellent in productivity. (3) Since the surface side with a high Zn concentration is base, corrosion progresses evenly and is particularly effective in preventing migration.

第4に、上記濃度分布を有するCu−Zn合金層におい
て、Zn量1%以上の厚さを1μm以上としたのは、1
μm未満では前記Znの効果が実用上得難いためである
Fourthly, in the Cu-Zn alloy layer having the above concentration distribution, the thickness of the Zn content of 1% or more is 1 μm or more.
This is because if the thickness is less than μm, it is difficult to practically obtain the effect of Zn.

〔実施例1〕 以下に実施例により本発明を更に具体的に説明する。[Example 1] The present invention will be explained in more detail below with reference to Examples.

厚さ55μmのタフピッチ銅圧延銅箔の両表面に、第1
表に示すメッキ条件で第2表に示すZn及びZn合金層
をメッキにより設けた。即ちZnメッキはZn (ON
 )l浴を用い、Cu −Zn合金はCuCNとZn(
ON)。
The first layer was applied to both surfaces of the tough pitch copper rolled copper foil with a thickness of 55 μm.
The Zn and Zn alloy layers shown in Table 2 were provided by plating under the plating conditions shown in the table. That is, Zn plating is Zn (ON
) l bath, Cu-Zn alloy was prepared using CuCN and Zn (
ON).

の混合浴を用いて行なった。The test was carried out using a mixed bath.

第1表 第2表 次にこれらの銅箔をガラスエポキシ板とクラッドしてか
ら、以下にのべる方法で半田付時の濡れ面積、半田接合
強度を求めると共に、リーク電流を測定した。
Table 1 Table 2 Next, these copper foils were clad with a glass epoxy plate, and the wetted area and solder joint strength during soldering were determined by the methods described below, as well as the leakage current was measured.

、(A)  プリフラックス(タムラ化研・ソルダーラ
イトBIIIR)をコートしてから、85℃×85%R
Hの恒温恒湿槽中に168hr保持した後、弱活性フラ
ックス(タムラ化研・MH820)を塗布し、MIL法
に準じて235℃のPb−60%Sn浴に3 sec浸
漬した後、濡れ面積を求めた。
, (A) After coating with preflux (Tamura Kaken/Solderite BIIIR), 85°C x 85% R
After being kept in a constant temperature and humidity chamber of I asked for

(B)3X5mmの部分にリード線をハンダ付してから
、120℃X1000hrエージングした後引張試験を
行なって半田接合強度を求めた。
(B) A lead wire was soldered to a 3×5 mm portion, and after aging at 120° C. for 1000 hours, a tensile test was conducted to determine the solder joint strength.

(C)  エツチングによりLO■間隔の回路を形成し
、25v(DC)を印加して85℃x85%RHの恒温
恒湿槽中に168hr保持した後、リーク電流を測定し
た。
(C) A circuit with LO ■ intervals was formed by etching, and after applying 25 V (DC) and maintaining it in a constant temperature and humidity chamber at 85° C. and 85% RH for 168 hr, leakage current was measured.

以上の結果を第2表にまとめて示す。本発明例Nal〜
5は半田濡れ性、半田接合強度、リーク電流等いずれの
特性も満足すべきものであるが、従来例N11llは半
田接合強度が劣っていると共に、Cuのマイグレーショ
ンが起りやすく、リーク電流が大きくなっている。又Z
n合金層の厚さが01μm未満の比較例Nl112は、
本試験条件においては半田接合強度、リーク電流等に関
して充分な改善が認められない。尚本発明例Nll〜5
の内、Zn又はZn合金層が純ZnであるNULL、2
は、Zn合金であるNCL3〜5にくらべて半田濡れ性
が劣っている。
The above results are summarized in Table 2. Invention example Nal~
No. 5 should satisfy all properties such as solder wettability, solder joint strength, and leakage current, but conventional example N11ll has poor solder joint strength, Cu migration tends to occur, and leakage current increases. There is. Mata Z
Comparative example Nl112 in which the thickness of the n alloy layer is less than 01 μm is
Under these test conditions, no sufficient improvement was observed in terms of solder joint strength, leakage current, etc. In addition, the present invention example Nll~5
NULL, 2 where the Zn or Zn alloy layer is pure Zn
The solder wettability is inferior to NCL3-5 which are Zn alloys.

〔実施例2〕 厚さ012mmのCu −0,05%Ag合金板の両表
面にZn層をメッキにより設けてから加熱拡散処理を行
ない、次に厚さ55μm迄圧延した。上記銅合金箔につ
いて、AES(オージェ分光分析)法により表面及び1
μm深さにおけるZn濃度の分析を行なうと共に導電率
を測定した。更にこれらの銅合金箔をガラスエポキシ板
とクラッドし、実施例1で述べたのと同様な方法で、半
田付時の濡れ面積、半田接合強度を求めると共にリーク
電流を測定し念。これらの結果を第3表にまとめて示す
[Example 2] Zn layers were provided on both surfaces of a Cu-0.05%Ag alloy plate with a thickness of 012 mm by plating, followed by heat diffusion treatment, and then rolled to a thickness of 55 μm. Regarding the above copper alloy foil, the surface and 1
The Zn concentration at a depth of μm was analyzed and the electrical conductivity was measured. Furthermore, these copper alloy foils were clad with a glass epoxy plate, and in the same manner as described in Example 1, the wetted area and solder joint strength during soldering were determined, and the leakage current was also measured. These results are summarized in Table 3.

第3表から明らかな様に、本発明例随6〜8は、導電率
、半田濡れ性、半田接合強度、リーク電流等のいずれに
関しても満足すべき特性が得られている。Na6、随7
は夫々前記N11L1、随2とZn被覆量が近似してい
るが、濡れ面積等の点でより優れた特性が得られている
。又比較例Nα13はZn量が不充分であって、1μm
深さでα1%程度しかないため、本試験条件においては
半田接合強度、リーク電流等に関して充分な改善が認め
られない。
As is clear from Table 3, Examples 6 to 8 of the present invention have satisfactory characteristics in terms of electrical conductivity, solder wettability, solder joint strength, leakage current, etc. Na6, Sui7
Although the coating amounts of Zn are similar to those of N11L1 and No. 2, respectively, better properties are obtained in terms of wetted area and the like. In addition, Comparative Example Nα13 had an insufficient amount of Zn, with a thickness of 1 μm.
Since the depth is only about α1%, no sufficient improvement is observed in terms of solder joint strength, leakage current, etc. under the present test conditions.

〔発明の効果〕〔Effect of the invention〕

本発明によって電気回路板用−系基材の緒特性が大巾に
向上し、電子機器に対する小型化、高密度化、信頼性向
上等の強い要求に対応するために不可欠な改良された回
路基板が実現される。而して本発明によるCu系基材は
各種プリント回路板はもとより、テープキャリヤーや配
線回路用ブスバー等広範囲な用途が期待出来、工業上顕
著な効果を奏するものである。
The present invention greatly improves the properties of the base material for electric circuit boards, and provides an improved circuit board that is indispensable for meeting the strong demands for smaller size, higher density, and improved reliability for electronic devices. is realized. The Cu-based base material according to the present invention can be expected to be used in a wide range of applications such as tape carriers and busbars for wiring circuits, as well as various printed circuit boards, and has a remarkable industrial effect.

Claims (5)

【特許請求の範囲】[Claims] (1)Cu系基材表面の少く共一部にZn又はZn合金
層を設けたことを特徴とする電気回路板用Cu系基材。
(1) A Cu base material for an electric circuit board, characterized in that a Zn or Zn alloy layer is provided on at least a common portion of the surface of the Cu base material.
(2)Zn又はZn合金層の厚さが0.1〜10μmで
あることを特徴とする特許請求の範囲第1項記載の電気
回路板用Cu系基材。
(2) The Cu base material for an electric circuit board according to claim 1, wherein the Zn or Zn alloy layer has a thickness of 0.1 to 10 μm.
(3)Zn合金がZn量1〜60%のCu−Zn合金で
あることを特徴とする特許請求の範囲第1項記載の電気
回路板用Cu系基材。
(3) The Cu base material for an electric circuit board according to claim 1, wherein the Zn alloy is a Cu-Zn alloy with a Zn content of 1 to 60%.
(4)Zn濃度が表面から内部に向って減少する分布を
し、Zn量1%以上の厚さが少く共1μm以上あること
を特徴とする特許請求の範囲第3項記載の電気回路板用
Cu系基材。
(4) An electric circuit board according to claim 3, characterized in that the Zn concentration has a distribution that decreases from the surface toward the inside, and the thickness of the Zn content of 1% or more is at least 1 μm or more. Cu base material.
(5)Cu系基材表面の少く共一部にZn又はZn合金
層を設け、該基材を加熱拡散処理することを特徴とする
電気回路板用Cu系基材の製造方法。
(5) A method for manufacturing a Cu base material for an electric circuit board, which comprises providing a Zn or Zn alloy layer on a small portion of the surface of the Cu base material, and subjecting the base material to a heat diffusion treatment.
JP22519386A 1986-09-24 1986-09-24 Cu based substrate for electric circuit board and manufacture thereof Pending JPS6380412A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22519386A JPS6380412A (en) 1986-09-24 1986-09-24 Cu based substrate for electric circuit board and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22519386A JPS6380412A (en) 1986-09-24 1986-09-24 Cu based substrate for electric circuit board and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS6380412A true JPS6380412A (en) 1988-04-11

Family

ID=16825427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22519386A Pending JPS6380412A (en) 1986-09-24 1986-09-24 Cu based substrate for electric circuit board and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS6380412A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0355711A (en) * 1989-07-24 1991-03-11 Hitachi Cable Ltd Copper material for terminal and connector
JP2012124025A (en) * 2010-12-08 2012-06-28 Hitachi Cable Ltd Plated copper wire and manufacturing method thereof
JP5022238B2 (en) * 2006-12-26 2012-09-12 三井金属鉱業株式会社 Capacitor layer forming material for multilayer printed wiring board and method for manufacturing capacitor layer forming material
WO2017141985A1 (en) * 2016-02-18 2017-08-24 三井金属鉱業株式会社 Copper foil for printed circuit board production, copper foil with carrier, and copper-clad laminate plate, and printed circuit board production method using copper foil for printed circuit board production, copper foil with carrier, and copper-clad laminate plate
WO2017141983A1 (en) * 2016-02-18 2017-08-24 三井金属鉱業株式会社 Printed circuit board production method

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0355711A (en) * 1989-07-24 1991-03-11 Hitachi Cable Ltd Copper material for terminal and connector
JP5022238B2 (en) * 2006-12-26 2012-09-12 三井金属鉱業株式会社 Capacitor layer forming material for multilayer printed wiring board and method for manufacturing capacitor layer forming material
JP2012124025A (en) * 2010-12-08 2012-06-28 Hitachi Cable Ltd Plated copper wire and manufacturing method thereof
CN102543249A (en) * 2010-12-08 2012-07-04 日立电线株式会社 Plating coating copper wire and method for making the same
WO2017141985A1 (en) * 2016-02-18 2017-08-24 三井金属鉱業株式会社 Copper foil for printed circuit board production, copper foil with carrier, and copper-clad laminate plate, and printed circuit board production method using copper foil for printed circuit board production, copper foil with carrier, and copper-clad laminate plate
WO2017141983A1 (en) * 2016-02-18 2017-08-24 三井金属鉱業株式会社 Printed circuit board production method
CN108464062A (en) * 2016-02-18 2018-08-28 三井金属矿业株式会社 The manufacturing method of printed circuit board
CN108464062B (en) * 2016-02-18 2020-10-27 三井金属矿业株式会社 Method for manufacturing printed circuit board

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