JPS6376179A - Manufacture of magnetic bubble memory element - Google Patents

Manufacture of magnetic bubble memory element

Info

Publication number
JPS6376179A
JPS6376179A JP21979086A JP21979086A JPS6376179A JP S6376179 A JPS6376179 A JP S6376179A JP 21979086 A JP21979086 A JP 21979086A JP 21979086 A JP21979086 A JP 21979086A JP S6376179 A JPS6376179 A JP S6376179A
Authority
JP
Japan
Prior art keywords
conductor pattern
flattening
insulating layer
pattern
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21979086A
Other languages
Japanese (ja)
Inventor
Hiroshi Inoue
博史 井上
Hideki Fujiwara
英樹 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP21979086A priority Critical patent/JPS6376179A/en
Publication of JPS6376179A publication Critical patent/JPS6376179A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To improve a flattening degree by etching locally a first insulating layer formed at a garnet film for a bubble and a primarily flattening the recessed part formed with a width wider than a conductor pattern width by a resin, then forming a conductor pattern and further, executing secondary flattening with a resin. CONSTITUTION:The first insulating layer 12 formed at a garnet film 11 for a bubble is etched and a recessed part 12a of the width wider than the pattern width of a conductor pattern 14 formed later is formed. Thereafter, the primary flattening is executed by an organic high polymer resin 13 and next, the conductor pattern 14 is formed at the recessed part 12a of the first insulating layer 12. Further, the secondary flattening is executed for the conductor pattern 14 by an organic high polymer resin 15. Thus, the positioning of the recessed part 12a and the conductor pattern 14 comes to be easier and satisfactory flattening can be executed.

Description

【発明の詳細な説明】 〔概 要〕 磁気バブルメモリ素子の製造方法であって、バブル用ガ
ーネット膜に形成される第1絶縁層を局部的にエツチン
グして導体パターン幅より広い幅の凹部を形成し、該凹
部を樹脂により第1次平坦化を行なった後該凹部に導体
パターンを形成し、さらに樹脂により第2次平坦化を行
なうことにより、平坦化度の向上を可能とする。
[Detailed Description of the Invention] [Summary] A method for manufacturing a magnetic bubble memory element, which comprises locally etching a first insulating layer formed in a garnet film for bubbles to form a recessed portion having a width wider than the width of a conductor pattern. The degree of flattening can be improved by forming a conductor pattern in the recessed portion, performing primary planarization using resin, and then performing secondary planarization using resin.

〔産業上の利用分野〕[Industrial application field]

本発明は電子計算装置等の記憶装置に用いられる磁気バ
ブルメモリ素子に関するもので、さらに詳しく言えば導
体パターンの平坦化を向上した磁気バブルメモリ素子の
製造方法に関するものである。
The present invention relates to a magnetic bubble memory element used in a storage device such as an electronic computing device, and more specifically, to a method of manufacturing a magnetic bubble memory element with improved planarization of a conductor pattern.

磁気バブルメモリ装置は、例えばガドリニウム・ガリウ
ム・ガーネットの単結晶非磁性基板の上に液相エピタキ
シャル成長法により磁性ガーネット膜を形成し、その上
にパーマロイ等の軟磁性薄膜を用いたハーフディスク等
のパターンを行列させたバブル転送路を形成したもので
あり、バブル発生器により情報に従って発生させたバブ
ルを転送路に導き、そのパターンにバブルがある場合を
“1”、ない場合を“0”として情報を記jQさせるよ
うになっている。そして素子構成としては、アクセス時
間を早くするため、情報格納部分を多数のループとし書
き込み、読み出しはメジャーラインを介して行なうメジ
ャーマイナ一方式が主として採用されている。
A magnetic bubble memory device is made by forming a magnetic garnet film by liquid phase epitaxial growth on a single-crystal nonmagnetic substrate made of gadolinium, gallium, or garnet, for example, and then forming a pattern such as a half disk using a soft magnetic thin film such as permalloy on top of the magnetic garnet film by liquid phase epitaxial growth. The bubbles generated by the bubble generator according to the information are guided to the transfer path, and the information is set as "1" if there is a bubble in the pattern and "0" if there is no bubble. It is designed to write jQ. As for the device configuration, in order to speed up the access time, a major-minor type is mainly adopted, in which the information storage section is formed into many loops and writing is performed, and reading is performed via major lines.

このメジャーマイナ一方式では、マイナーループとメジ
ャーライン間のバブルの転送にトランスファゲート、ス
ワップゲート等が用いられている。
In this major-minor one-sided system, transfer gates, swap gates, etc. are used to transfer bubbles between the minor loop and the major line.

これらのゲートはパーマロイ等の軟磁性薄膜パターンと
、それに交差する導体パターンにより構成されている。
These gates are composed of a soft magnetic thin film pattern such as permalloy and a conductor pattern that intersects with the pattern.

このようなゲートにおいて、軟磁性薄膜パターンは絶縁
層を介して導体パターンの上に形成されるため、該導体
パターンにより段差部が生じ、その段差部によりバブル
の転送特性を劣化させるという問題があっデこ。このた
め次のような平坦化法が考えられている。
In such gates, the soft magnetic thin film pattern is formed on the conductor pattern via an insulating layer, so there is a problem that the conductor pattern creates a step, which deteriorates the bubble transfer characteristics. Deko. For this reason, the following flattening method has been considered.

〔従来の技術〕[Conventional technology]

従来の平坦化法としては、第2図aに示すように4体パ
ターン3と軟磁性薄膜パターン5との間の層間絶縁膜4
に樹脂を用いる方法とか、第2図すに示すようにガーネ
ット膜1上に形成された絶縁膜2に導体パターン3を埋
め込み、さらに樹脂を層間絶縁膜4に用いる方法、ある
いは第2図Cに示すように導体パターン3の上にレジス
トパターン6を形成し、その上から全面にスパッタ又は
蒸着によりSiO絶縁膜7を形成したのち、レジスト6
と共にその上のSiO膜を除去するリフトオフ法などが
ある。
In the conventional planarization method, as shown in FIG.
There is a method of using resin for the interlayer insulation film 4, a method of embedding the conductor pattern 3 in the insulating film 2 formed on the garnet film 1 as shown in FIG. As shown, a resist pattern 6 is formed on the conductor pattern 3, and a SiO insulating film 7 is formed on the entire surface by sputtering or vapor deposition.
There is also a lift-off method that removes the SiO film thereon.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来の平坦化法において、第2図aの樹脂による平
坦化は、平坦化と樹脂膜厚に相関があり、樹脂層の厚み
を薄(すると平坦化効果が小さくなるという欠点があり
、第2図すの導体埋め込み法は絶縁層2に設けた凹部と
導体パターン3との位置合わせが困難であり、位置合わ
せを容易にするため凹部の幅を広くすれば樹脂4による
平坦化が不完全になるという欠点があり、第2図Cのり
フトオフ法は、その材材料の選定が困難なことや、リフ
トオフ時に導体パターンを傷つけその信頼性を低下させ
る等の欠点があった。
In the above-mentioned conventional planarization method, planarization using a resin as shown in FIG. 2a has a correlation between planarization and resin film thickness. In the conductor embedding method shown in Figure 2, it is difficult to align the recess provided in the insulating layer 2 and the conductor pattern 3.If the width of the recess is widened to facilitate alignment, flattening by the resin 4 may be incomplete. The lift-off method shown in FIG. 2C has disadvantages such as difficulty in selecting the material and damage to the conductor pattern during lift-off, reducing its reliability.

本発明はこのような点に鑑みて創作されたもので、製造
容易で平坦化効果が大きく、且つ導体パターンの信頼性
を低下しない磁気バブルメモリ素子の製造方法を提供す
ることを目的としている。
The present invention was created in view of these points, and an object of the present invention is to provide a method for manufacturing a magnetic bubble memory element that is easy to manufacture, has a large planarization effect, and does not reduce the reliability of the conductor pattern.

〔問題点を解決するための手段〕[Means for solving problems]

このため本発明においては、バブル用ガーネット膜11
に形成される第1絶縁層12を局部的にエツチングして
、後で形成される導体パターン14のパターン幅より広
い幅の凹部12aを形成する工程、その後、有機高分子
樹脂13よって第1次平坦化を行なう工程、次いで前記
第1絶縁層12の凹部12aに導体パターン14を形成
する工程、さらに上記導体パターン14を有機高分子樹
脂I5により第2次の平坦化を行なう工程の諸工程を含
んで成ることを特徴としている。
Therefore, in the present invention, the bubble garnet film 11
A process of locally etching the first insulating layer 12 formed in the first insulating layer 12 to form a recess 12a having a width wider than the pattern width of the conductor pattern 14 to be formed later; The steps include a step of planarizing, a step of forming a conductor pattern 14 in the recess 12a of the first insulating layer 12, and a step of second planarizing the conductor pattern 14 with an organic polymer resin I5. It is characterized by comprising.

〔作 用〕[For production]

第1絶縁層12に形成する凹部12aを導体パターン1
4のパターン幅より広くすることにより前記凹部12a
と導体パターン14の位置合わせが容易となり、また樹
脂による平坦化を2回導体パターン形成の前後に行なう
ことにより良好な平坦化が可能となる。
The recess 12a formed in the first insulating layer 12 is
By making the pattern width wider than No. 4, the recess 12a
This makes positioning of the conductor pattern 14 easy, and good flattening can be achieved by performing flattening with resin twice before and after forming the conductor pattern.

〔実施例〕〔Example〕

第1図は本発明の詳細な説明するだめの図であり、a 
Ndはその工程図である。
FIG. 1 is a detailed explanatory diagram of the present invention, and a
Nd is the process diagram.

本実施例は先ず第1図aに示すように第1絶縁N(Si
ft)  12をガーネット膜11上に形成し、その第
1絶縁層12に導体パターンが配置される位置より大き
な領域をエツチングして凹部12aを形成する。次に第
1図すに示すように該凹部12aを有機高分子樹脂13
により第1次平坦化を行なう。この時の平坦化程度は小
さいものである。次に第1図Cに示すように第1次平坦
化を行なった凹部12aに導体パターン14を形成し次
いで有機高分子樹脂15により第2次平坦化を行ない、
最後に第1図dの如く軟磁性薄膜パターン16を形成す
るのである。
In this embodiment, first, as shown in FIG.
ft) 12 is formed on the garnet film 11, and a region larger than the position where the conductor pattern is arranged in the first insulating layer 12 is etched to form a recess 12a. Next, as shown in FIG.
First flattening is performed using the following steps. The degree of flattening at this time is small. Next, as shown in FIG. 1C, a conductive pattern 14 is formed in the concave portion 12a that has been subjected to the first planarization, and then a second planarization is performed using an organic polymer resin 15.
Finally, a soft magnetic thin film pattern 16 is formed as shown in FIG. 1d.

本実施例によれば、絶縁層に導体パターンより大きな領
域の凹部を形成し、1次、2次の2回の平坦化を行なう
ため、従来の樹脂を導体上に塗布するのみの方法(第2
図a)よりも平坦化効果が大きく、また導体埋め込み方
式のもつ凹部形成と導体パターンの位置合わせ精度も従
来法(第2図b)より緩和できるという利点があり、さ
らに従来のリフトオフ法(第2図C)の如く導体を傷つ
けるようなこともなく信頼性に優れている。
According to this example, in order to form a recess in an area larger than the conductor pattern in the insulating layer and flatten it twice, primary and secondary, the conventional method of simply applying resin onto the conductor (the 2
It has the advantage that the flattening effect is greater than that of the conventional lift-off method (Fig. 2 b), and that the accuracy of recess formation and conductor pattern alignment, which the conductor embedding method has, can be reduced compared to the conventional method (Fig. 2 b). As shown in Figure 2C), it does not damage the conductor and has excellent reliability.

〔発明の効果〕〔Effect of the invention〕

以上述べてきたように、本発明によれば、導体の位置合
わせ精度が緩くとも良く、且つ平坦化効果が大きく、さ
らに信頼性が優れている等の利点を有し、実用的には極
めて有用である。
As described above, the present invention has the advantages that the alignment accuracy of the conductor does not need to be loose, has a large flattening effect, and has excellent reliability, and is extremely useful in practice. It is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の詳細な説明するための図、第2図は従
来の平坦化法を説明するための図である。 第1図において、 10は基板、 11はガーネット膜、 12は第1絶縁層(SiO□)、 12aは凹部、 13 、15は有機高分子樹脂、 14は導体パターン、 16は軟磁性薄膜パターンである。
FIG. 1 is a diagram for explaining the present invention in detail, and FIG. 2 is a diagram for explaining the conventional planarization method. In FIG. 1, 10 is a substrate, 11 is a garnet film, 12 is a first insulating layer (SiO□), 12a is a recess, 13 and 15 are organic polymer resins, 14 is a conductive pattern, and 16 is a soft magnetic thin film pattern. be.

Claims (1)

【特許請求の範囲】 1、バブル用ガーネット膜(11)に形成される第1絶
縁層(12)を局部的にエッチングして、後で形成され
る導体パターン(14)のパターン幅より広い幅の凹部
(12a)を形成する工程、 その後、有機高分子樹脂(13)によって第1次平坦化
を行なう工程、 次いで前記第1絶縁層(12)の凹部(12a)に導体
パターン(14)を形成する工程、 さらに上記導体パターン(14)を有機高分子樹脂(1
5)により第2次の平坦化を行なう工程の諸工程を含ん
で成る磁気バブルメモリ素子の製造方法。
[Claims] 1. The first insulating layer (12) formed on the bubble garnet film (11) is locally etched to have a width wider than the pattern width of the conductor pattern (14) to be formed later. A step of forming a recess (12a) in the first insulating layer (12), followed by a step of performing primary planarization using an organic polymer resin (13), and then forming a conductive pattern (14) in the recess (12a) of the first insulating layer (12). Further, the conductor pattern (14) is coated with an organic polymer resin (14).
5) A method for manufacturing a magnetic bubble memory element, comprising the steps of performing secondary planarization according to step 5).
JP21979086A 1986-09-19 1986-09-19 Manufacture of magnetic bubble memory element Pending JPS6376179A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21979086A JPS6376179A (en) 1986-09-19 1986-09-19 Manufacture of magnetic bubble memory element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21979086A JPS6376179A (en) 1986-09-19 1986-09-19 Manufacture of magnetic bubble memory element

Publications (1)

Publication Number Publication Date
JPS6376179A true JPS6376179A (en) 1988-04-06

Family

ID=16741060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21979086A Pending JPS6376179A (en) 1986-09-19 1986-09-19 Manufacture of magnetic bubble memory element

Country Status (1)

Country Link
JP (1) JPS6376179A (en)

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