JPS6375073U - - Google Patents
Info
- Publication number
- JPS6375073U JPS6375073U JP16962886U JP16962886U JPS6375073U JP S6375073 U JPS6375073 U JP S6375073U JP 16962886 U JP16962886 U JP 16962886U JP 16962886 U JP16962886 U JP 16962886U JP S6375073 U JPS6375073 U JP S6375073U
- Authority
- JP
- Japan
- Prior art keywords
- printed circuit
- circuit board
- hole
- lead wire
- solder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 229910000679 solder Inorganic materials 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 4
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims description 3
- 238000005476 soldering Methods 0.000 claims description 2
- 239000011888 foil Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 8
- 230000000873 masking effect Effects 0.000 description 3
- 230000037431 insertion Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
第１図は、プリント基板の半田面にマスキング
テープを貼付け、部品実装し半田付けした例を示
す図。第２図は、従来基板のラウンドの例を示す
図。第３図は、従来基板のラウンド部にマスキン
グテープを貼付けしないで半田付けした例を示す
図。第４図ａは、本考案のラウンドの穴の内側の
導体部分を削除した時の図。第４図ｂは、本考案
のラウンドの穴の内側の導体部分の一部に半田レ
ジストにより半田付けしない様にしたラウンドの
構造図。第５図は、第４図の本考案のラウンドに
半田付けをした時の図。第６図は、本考案のプリ
ント基板に部品を実装し、半田槽を通し半田付け
を実施した時の状態を示す図。第７図は、第６図
の状態に部品５を後付けした時の図。
１……プリント基板、２……半田槽、３……ラ
ウンド、４……マスキングテープ、５……部品、
６……半田、７……半田レジスト、８……部品リ
ード線挿入穴。
FIG. 1 is a diagram showing an example in which masking tape is pasted on the solder surface of a printed circuit board, components are mounted, and soldered. FIG. 2 is a diagram showing an example of the round shape of a conventional board. FIG. 3 is a diagram showing an example of soldering without applying masking tape to the round portion of a conventional board. FIG. 4a is a diagram when the conductor portion inside the round hole of the present invention is removed. FIG. 4b is a structural diagram of a round according to the present invention in which a part of the conductor portion inside the hole of the round is not soldered by using a solder resist. Figure 5 is a diagram when the round of the present invention shown in Figure 4 is soldered. FIG. 6 is a diagram showing a state in which components are mounted on the printed circuit board of the present invention and soldered through a solder bath. FIG. 7 is a diagram when the component 5 is retrofitted to the state shown in FIG. 6. 1... Printed circuit board, 2... Solder tank, 3... Round, 4... Masking tape, 5... Parts,
6...Solder, 7...Solder resist, 8...Component lead wire insertion hole.
Claims (1)
品のリード線と基板導体を接続するリード線を挿
入する穴のまわりの導体箔の構造を、穴の周囲の
少なくとも０．２ｍ／ｍ以上を、半田付け時に半
田の付着しない層とすることを特徴とするプリン
ト基板。 In a printed circuit board on which electronic components are mounted, the conductor foil structure around the hole into which the lead wire connecting the component lead wire and the board conductor is inserted is at least 0.2 m/m or more around the hole. A printed circuit board characterized by having a layer to which solder does not adhere during soldering.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16962886U JPS6375073U (en) | 1986-11-04 | 1986-11-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16962886U JPS6375073U (en) | 1986-11-04 | 1986-11-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6375073U true JPS6375073U (en) | 1988-05-19 |
Family
ID=31103614
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16962886U Pending JPS6375073U (en) | 1986-11-04 | 1986-11-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6375073U (en) |
-
1986
- 1986-11-04 JP JP16962886U patent/JPS6375073U/ja active Pending
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