JPS6372628U - - Google Patents

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Publication number
JPS6372628U
JPS6372628U JP14907886U JP14907886U JPS6372628U JP S6372628 U JPS6372628 U JP S6372628U JP 14907886 U JP14907886 U JP 14907886U JP 14907886 U JP14907886 U JP 14907886U JP S6372628 U JPS6372628 U JP S6372628U
Authority
JP
Japan
Prior art keywords
power
open
transistor
turned
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14907886U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14907886U priority Critical patent/JPS6372628U/ja
Publication of JPS6372628U publication Critical patent/JPS6372628U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案にかかる電源投入時誤動作防止
回路の一実施例、第2図はオープンコレクタ型デ
バイス内部の等価回路の一実施例、第3図は第1
図におけるタイミングチヤート、第4図は従来の
電源投入時誤動作防止回路、第5図は第4図にお
けるタイミングチヤートである。 1……オープンコレクタ又はオープンドレイン
型のデバイス、2……トランジスタ、3……抵抗
、4……電源端子、5……トランジスタ、6……
TTL又はCMOSデバイス、7……アンドゲー
ト。
Fig. 1 shows an example of the power-on malfunction prevention circuit according to the present invention, Fig. 2 shows an example of an equivalent circuit inside an open collector type device, and Fig. 3 shows an example of the equivalent circuit inside the open collector type device.
The timing chart in the figure, FIG. 4 is a conventional malfunction prevention circuit at power-on, and FIG. 5 is a timing chart in FIG. 4. 1... Open collector or open drain type device, 2... Transistor, 3... Resistor, 4... Power supply terminal, 5... Transistor, 6...
TTL or CMOS device, 7...and gate.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] オープンコレクタ又はオープンドレイン型のデ
バイスと、該デバイスの出力端子と電源端子との
間に抵抗とトランジスタとを直列に接続した直列
回路とを具備し、上記トランジスタは電源投入時
に発生するリセツト信号に基づき開閉する様に構
成したことを特徴とする電源投入時誤動作防止回
路。
It is equipped with an open collector or open drain type device and a series circuit in which a resistor and a transistor are connected in series between the output terminal of the device and a power supply terminal, and the transistor is reset based on a reset signal generated when the power is turned on. A circuit for preventing malfunction when power is turned on, characterized in that it is configured to open and close.
JP14907886U 1986-09-29 1986-09-29 Pending JPS6372628U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14907886U JPS6372628U (en) 1986-09-29 1986-09-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14907886U JPS6372628U (en) 1986-09-29 1986-09-29

Publications (1)

Publication Number Publication Date
JPS6372628U true JPS6372628U (en) 1988-05-16

Family

ID=31063947

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14907886U Pending JPS6372628U (en) 1986-09-29 1986-09-29

Country Status (1)

Country Link
JP (1) JPS6372628U (en)

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