JPS6368257U - - Google Patents
Info
- Publication number
- JPS6368257U JPS6368257U JP16148086U JP16148086U JPS6368257U JP S6368257 U JPS6368257 U JP S6368257U JP 16148086 U JP16148086 U JP 16148086U JP 16148086 U JP16148086 U JP 16148086U JP S6368257 U JPS6368257 U JP S6368257U
- Authority
- JP
- Japan
- Prior art keywords
- blanking
- supplied
- resistor
- video signal
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Details Of Television Scanning (AREA)
Description
第１図は本考案による帰線消去回路の一実施例
を示す回路図、第２図ａ〜ｃは第１図の動作を説
明するためのタイミングチヤート、第３図は従来
の帰線消去回路の一例を示す回路図である。
ＴＲ１……トランジスタ、Ｒ１，Ｒ２，Ｒ３…
…抵抗、ＩＮ１，ＩＮ２……オープンコレクタ形
インバータ、Ｉ１，Ｉ２……入力端子、Ｏ１……
出力端子、＋Ｂ１……基準電源電圧。
FIG. 1 is a circuit diagram showing an embodiment of the blanking circuit according to the present invention, FIGS. 2 a to c are timing charts for explaining the operation of FIG. 1, and FIG. 3 is a conventional blanking circuit. It is a circuit diagram showing an example. TR 1 ...transistor, R 1 , R 2 , R 3 ...
...Resistor, IN 1 , IN 2 ... Open collector inverter, I 1 , I 2 ... Input terminal, O 1 ...
Output terminal, +B 1 ...Reference power supply voltage.
Claims (1)
大きな該当電圧を印加して陰極線管の帰線消去を
行う帰線消去回路において、一方の出力電極が前
記カソード電極と、基準電源に接続された第１の
抵抗とに接続され、他方の出力電極が第２の抵抗
を介して第３の抵抗の一端に接続され、かつ入力
電極に所定の電圧が印加されるトランジスタなど
の能動素子を備え、前記第２の抵抗と前記第３の
抵抗との接続点に第１のゲート回路を介して負論
理のＴＴＬレベルでのビデオ信号が供給され、か
つ前記第３の抵抗の他端に第２のゲート回路を介
して前記ビデオ信号のブランキング期間に正論理
のブランキング信号が供給されるように構成し、
前記陰極線管のカソード電極に、前記ブランキン
グ期間に前記該当電圧を印加するようにしたこと
を特徴とする帰線消去回路。 (2) 前記第１のゲート回路として、入力端に正
論理のＴＴＬレベルでのビデオ信号が供給される
オープンコレクタ形インバータを用いるか、ある
いは入力端に負論理のＴＴＬレベルでのビデオ信
号が供給されるオープンコレクタ形バツフアゲー
トを用い、かつ前記第２のゲート回路として、入
力端に前記ビデオ信号のブランキング期間に負論
理のブランキング信号が供給されるオープンコレ
クタ形インバータを用いるか、あるいは入力端に
前記ビデオ信号のブランキング期間に正論理のブ
ランキング信号が供給されるオープンコレクタ形
バツフアゲートを用いてなる実用新案登録請求の
範囲第１項記載の帰線消去回路。[Claims for Utility Model Registration] (1) In a blanking circuit that performs blanking of a cathode ray tube by applying a corresponding voltage larger than a control electrode to the cathode electrode of the cathode ray tube, one output electrode is connected to the cathode electrode. and a first resistor connected to a reference power supply, the other output electrode is connected to one end of the third resistor via the second resistor, and a predetermined voltage is applied to the input electrode. The device includes an active element such as a transistor, a video signal at a TTL level of negative logic is supplied to a connection point between the second resistor and the third resistor via a first gate circuit, and the third resistor has an active element such as a transistor. A blanking signal of positive logic is supplied to the other end of the resistor via a second gate circuit during the blanking period of the video signal,
A blanking circuit characterized in that the corresponding voltage is applied to a cathode electrode of the cathode ray tube during the blanking period. (2) As the first gate circuit, an open collector inverter is used to which a positive logic TTL level video signal is supplied to the input terminal, or a negative logic TTL level video signal is supplied to the input terminal. The second gate circuit is an open collector type inverter whose input terminal is supplied with a negative logic blanking signal during the blanking period of the video signal. 2. The blanking circuit according to claim 1, which uses an open collector buffer gate to which a positive logic blanking signal is supplied during the blanking period of the video signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16148086U JPS6368257U (en) | 1986-10-20 | 1986-10-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16148086U JPS6368257U (en) | 1986-10-20 | 1986-10-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6368257U true JPS6368257U (en) | 1988-05-09 |
Family
ID=31087832
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16148086U Pending JPS6368257U (en) | 1986-10-20 | 1986-10-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6368257U (en) |
-
1986
- 1986-10-20 JP JP16148086U patent/JPS6368257U/ja active Pending
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