JPS612473A - Cathod-ray tube display device - Google Patents

Abstract

PURPOSE:To prevent a circuit from the complexity of constitution even if the number of video signal input lines is increased by integrating a pulse generated from a pulse generating circuit through a capacitor, shaping its waveform if necessary, and then connecting the shaped signal to the base of a base-earthed transistor (TR). CONSTITUTION:Since the potential of a point (b) immedately after turning on a power supply is lower than the threshold voltage level of a buffer circuit 8, the potential of a point (a) is in the low level. When the potential of the point (a) is turned to the low level, the bases of base-earthed TRs 5B-7B in video signal amplifier circuits 5-7 are turned to the low level and the circuits 5-7 are turned to cut-off status, so that no video is displayed on a CRT13. When the capacitor 9 is charged in proportion to time and the potential of the point (b) exceeds the thereshold volage level of the circuit 8, the potential of the point (a) is turned to the high level and the video is displayed. Thus, the base voltages of the TRs 5B-7B are controlled by the output obtained by integrating the output pulse of the pulse generating circuit 10 by the capacitor 9.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a display device having a cathode ray tube.

Conventional configurations and their problems In general, in cathode ray tube display devices, it is necessary to prevent transient image disturbances immediately after power is turned on, and to ensure that the cathode of the cathode ray tube is sufficiently heated by a heater after power is turned on. Until the cathode is heated, no video signal is applied to the cathode, and the cathode ray tube does not emit light. In order to increase the reliability of the cathode ray tube, the video input signal is cut off for a certain period of time after the power is turned on. ing.

FIG. 1 shows a conventional example of a cathode ray tube display device in which the video input signal is of a three-wire type.

In FIG. 1, numerals 1 to 3 are video input signal sources of red, green, and blue, respectively, which are negative polarity signals here. 4 is a NOR circuit to which the input signal is applied, and its output side is connected to red, green, and blue video signal amplification circuits 6 to 7, respectively. 8 is an inverter, the output side of which is connected to one input terminal (point a) of the NOR circuit 4; Reference numeral 9 denotes a pulse charging capacitor, which is connected to the input side (point b) of the inverter 8 and a pulse generating circuit 1o that generates pulses for a certain period of time after power is turned on.

In the configuration shown in the figure, when looking at the operation after the power is turned on, charging of the capacitor 9 starts immediately after the power is turned on by the output pulse of the pulse generation circuit 10, but the potential at point b immediately after the power is turned on is the threshold voltage of the inverter 8. Since the voltage level is smaller than the current level, the potential at point a is at a high level. When the potential at point a becomes a high level in this way, the output of the NOR circuit 4 becomes a low level regardless of the presence or absence of a video input signal, the video signal amplification circuits 5 to 7 do not operate, and no video is projected on the cathode ray tube. Not served.

Then, the charging of the capacitor 9 progresses with time, and when the potential at point b exceeds the threshold potential level of the inverter 8, the potential at point a becomes low level.

When the potential at point a becomes low level, the output of the NOR circuit 4 becomes the inverted version of the video input signal from the video input signal sources 1 to 3, which is amplified by the video amplification circuits 6 to 7 and applied to the cathode ray tube. is displayed.

Here, in the conventional circuit configuration as described above, the input section of the video signal is configured with one NOR circuit 4, and the control output from the inverter 8 is connected to one input terminal of the NOR circuit. However, the number of gates of the NOR circuit used increases in proportion to the number of video input signal lines, which is disadvantageous in terms of complexity and cost.

In order to specifically explain this drawback, FIG. 2 shows a case where the video input signal is of a 6-wire type. In Figure 2, 1 to 10
is the same as in Figure 1.

1' to 3' are separate video input signal sources for red, green, and blue, respectively;
This is an I)-A conversion circuit for a multicolor configuration of a 1μ video input section.

As is clear from the figure, when the video signal input section is configured with a NOR' circuit and the inverter 8 is connected to one input terminal, the number of gates of the NOR circuit 4 is proportional to the number of video input signal lines. The number of video signal input lines increases, making the circuit configuration even more complicated, which is disadvantageous in terms of cost.Objective of the Invention The present invention solves these conventional drawbacks and reduces the complexity of the circuit configuration even when the number of video signal input lines increases. The purpose is to serve.

Structure of the Invention In the present invention, the video amplification circuit is configured with a cascode amplification circuit consisting of a common emitter transistor and a common base transistor, and a video input signal is applied to the base of the common emitter transistor, and The pulse generated by the inter-pulse generating circuit is integrated by a capacitor, the waveform is shaped as necessary, and then the pulse is connected to the base of the common-base transistor.

According to this configuration, it is possible to prohibit the display of images for a certain period of time from the time the power is turned on with a simple circuit configuration, and there is no need to increase the number of circuits even if the number of video input lines increases, resulting in low cost. It is something that can be implemented.

Description of examples FIG. 3 shows an example of a circuit for implementing the present invention.

In the figure, numerals 1, 2, and 3 are red, green, and blue video input signal sources, respectively. 6 to 7 are video signal amplification circuits, each of which includes common emitter transistors 5E to 7E and common base transistor 5.
It is a cascode amplifier circuit composed of B to 7B, and one end of each load resistor is connected to the 1E1 power supply. 11.1
Reference numeral 2 denotes a base bias resistor, one end of which is connected to the +E2 power supply, the other end of which is grounded, and its intermediate point connected to the bases of the base-grounded transistors 5B to 7B of the cascode amplifier circuit. 8 is a buffer circuit (non-inverter circuit) for waveform shaping, and the output is connected to common base transistors 5B to 7.
The input is connected to the connection point (point b) between the pulse charging capacitor 9 and the pulse generating circuit 1°.

The operation after power is turned on in the configuration shown in the figure will be explained. Immediately after the power is turned on, charging of the capacitor 9 begins with a pulse generated for a certain period of time by the pulse generation circuit 1o, but since the potential at point b immediately after the power is turned on is lower than the threshold voltage level of the buffer circuit 8, the potential at point a is Becomes a low level.

When the potential at point a becomes low level, the video signal amplification circuits 6 to 7
The bases of the common base transistors 5B to 7B become low level, the video signal amplification circuits 5 to 7 are cut off, and no video is displayed on the cathode ray tube 13.

When the charging of the capacitor 9 progresses with time and the potential at point b exceeds the threshold voltage level of the buffer 1 circuit 8, the potential at point a becomes high level. Circuit 5'~7
Since the bases of the common base transistors 5B to 7B are supplied with a normal operating bias at the voltage division ratio of the resistor 11 and the resistor 12, the video signal amplification circuits 5 to 7 operate normally and operate according to the video input signal. A normal operation of supplying a video signal to the cathode ray tube 13 is performed. As a result, the cathode ray tube 13
The image will be displayed.

In this way, according to this circuit, the base-grounded transistors 5 of the video amplification circuits 5 to 7 in the cascode amplification circuit configuration are
Since the base voltage of B to 7B is controlled by the output of the pulse generator's output pulse integrated by a capacitor, it is not affected by the circuit configuration of the video input signal section or the number of video input lines, and only 3 sets of A video amplification circuit is sufficient and can achieve the initial purpose at low cost.

It goes without saying that the logical configuration changes depending on the polarity of the pulse generating circuit and the configuration of the buffer circuit, etc.

As described in detail, according to the present invention, in a cathode ray tube display device, it is possible to prevent transient image blurring immediately after power supply voltage is input, and to prevent the cathode portion of the cathode ray tube from being heated by the heater winding after power supply voltage is input. This device has the effect that a circuit for the purpose of increasing the reliability of a cathode ray tube by not transmitting a video signal to the cathode and causing the cathode ray tube to emit light until it is sufficiently heated by a wire can be constructed with a simple circuit configuration at a low cost. is 0

[Brief explanation of drawings]

1 and 2 are circuit diagrams of a conventional cathode ray tube display device, and FIG. 3 is a circuit diagram of a cathode ray tube display device according to an embodiment of the present invention. 1.2.3... Video input signal source, 5, 6.7. Video signal amplification circuit, 8. Buffer circuit, 9... Capacitor, 1o... Pulse generation circuit, 11゜12...・
・Resistance, 13...Cathode ray tube.

Claims (1)

[Claims] The video signal amplification circuit is constituted by a cascode amplification circuit consisting of a common emitter transistor and a common base transistor, and a video input signal is applied to the base of the common emitter transistor, and a pulse is applied to the base of the common base transistor for a certain period of time from when the power is turned on. A cathode ray tube display device characterized in that an output obtained by integrating the pulse output of a pulse generating circuit generated by a capacitor is added to the cathode ray tube display device so that an image is not displayed on the cathode ray tube for a certain period of time after power is turned on.