JPS6367370B2 - - Google Patents
Info
- Publication number
- JPS6367370B2 JPS6367370B2 JP55189439A JP18943980A JPS6367370B2 JP S6367370 B2 JPS6367370 B2 JP S6367370B2 JP 55189439 A JP55189439 A JP 55189439A JP 18943980 A JP18943980 A JP 18943980A JP S6367370 B2 JPS6367370 B2 JP S6367370B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- region
- source
- volts
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
- Electronic Switches (AREA)
- Logic Circuits (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/108,222 US4281400A (en) | 1979-12-28 | 1979-12-28 | Circuit for reducing the loading effect of an insulated-gate field-effect transistor (IGFET) on a signal source |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56109041A JPS56109041A (en) | 1981-08-29 |
JPS6367370B2 true JPS6367370B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1988-12-26 |
Family
ID=22320968
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18943980A Granted JPS56109041A (en) | 1979-12-28 | 1980-12-26 | Circuit for reducing load effect for signal source of insulated gate field effect transistor |
Country Status (2)
Country | Link |
---|---|
US (1) | US4281400A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
JP (1) | JPS56109041A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS56114196A (en) * | 1980-02-13 | 1981-09-08 | Sharp Corp | Ram circuit |
US4567387A (en) * | 1983-06-30 | 1986-01-28 | Rca Corporation | Linear sense amplifier |
JPH06103781A (ja) * | 1992-09-21 | 1994-04-15 | Sharp Corp | メモリセル回路 |
JP2003109389A (ja) * | 2001-09-28 | 2003-04-11 | Fujitsu Ltd | 半導体記憶装置 |
JP2009199675A (ja) * | 2008-02-22 | 2009-09-03 | Seiko Instruments Inc | 不揮発性半導体記憶装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3618053A (en) * | 1969-12-31 | 1971-11-02 | Westinghouse Electric Corp | Trapped charge memory cell |
US3617775A (en) * | 1970-06-03 | 1971-11-02 | James D Allen | Circuit for charging the distributed capacitance of a plated wire memory |
JPS528143A (en) * | 1976-07-08 | 1977-01-21 | Teijin Ltd | Slacken method of thread bunch package |
US4189782A (en) * | 1978-08-07 | 1980-02-19 | Rca Corporation | Memory organization |
-
1979
- 1979-12-28 US US06/108,222 patent/US4281400A/en not_active Expired - Lifetime
-
1980
- 1980-12-26 JP JP18943980A patent/JPS56109041A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS56109041A (en) | 1981-08-29 |
US4281400A (en) | 1981-07-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US4247791A (en) | CMOS Memory sense amplifier | |
US4648074A (en) | Reference circuit with semiconductor memory array | |
US3882467A (en) | Complementary field effect transistor memory cell | |
KR920008245B1 (ko) | 불휘발성 반도체기억장치 | |
KR100395261B1 (ko) | 반도체장치 | |
CA1110765A (en) | High speed igfet sense amplifier/latch | |
US4139911A (en) | High speed sense circuit for semiconductor memories | |
US4425632A (en) | Nonvolatile semiconductor memory device | |
EP0175880A2 (en) | Semiconductor memory device | |
JPS6314505B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
US4110840A (en) | Sense line charging system for random access memory | |
US4253162A (en) | Blocked source node field-effect circuitry | |
KR910000383B1 (ko) | 다이나믹형 랜덤억세스메모리 | |
US4697252A (en) | Dynamic type semiconductor memory device | |
KR19990006343A (ko) | 반도체 기억 장치 | |
US4123669A (en) | Logical OR circuit for programmed logic arrays | |
US5933373A (en) | Semiconductor memory device having constant potential generator for clamping digit lines at constant level allowing precharge transistor to slightly turn on | |
US6452833B2 (en) | Semiconductor memory device | |
JPS5944720B2 (ja) | ダイナミック半導体記憶装置 | |
JPS6367370B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
KR940005515B1 (ko) | 디코더 회로 | |
US5539701A (en) | Sense circuit for semiconductor memory devices | |
KR100267424B1 (ko) | 집적회로 | |
KR950004620B1 (ko) | 프로그램 가능한 불휘발성 스태틱 메모리 셀 및 그 메모리 | |
US3986054A (en) | High voltage integrated driver circuit |