JPS56109041A - Circuit for reducing load effect for signal source of insulated gate field effect transistor - Google Patents

Circuit for reducing load effect for signal source of insulated gate field effect transistor

Info

Publication number
JPS56109041A
JPS56109041A JP18943980A JP18943980A JPS56109041A JP S56109041 A JPS56109041 A JP S56109041A JP 18943980 A JP18943980 A JP 18943980A JP 18943980 A JP18943980 A JP 18943980A JP S56109041 A JPS56109041 A JP S56109041A
Authority
JP
Japan
Prior art keywords
circuit
signal source
insulated gate
gate field
reducing load
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18943980A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6367370B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Aizatsuku Shiyantsua Henri
Guriin Suchiyuwaato Rojiya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of JPS56109041A publication Critical patent/JPS56109041A/ja
Publication of JPS6367370B2 publication Critical patent/JPS6367370B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Read Only Memory (AREA)
JP18943980A 1979-12-28 1980-12-26 Circuit for reducing load effect for signal source of insulated gate field effect transistor Granted JPS56109041A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/108,222 US4281400A (en) 1979-12-28 1979-12-28 Circuit for reducing the loading effect of an insulated-gate field-effect transistor (IGFET) on a signal source

Publications (2)

Publication Number Publication Date
JPS56109041A true JPS56109041A (en) 1981-08-29
JPS6367370B2 JPS6367370B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1988-12-26

Family

ID=22320968

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18943980A Granted JPS56109041A (en) 1979-12-28 1980-12-26 Circuit for reducing load effect for signal source of insulated gate field effect transistor

Country Status (2)

Country Link
US (1) US4281400A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS56109041A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56114196A (en) * 1980-02-13 1981-09-08 Sharp Corp Ram circuit
US4567387A (en) * 1983-06-30 1986-01-28 Rca Corporation Linear sense amplifier
JPH06103781A (ja) * 1992-09-21 1994-04-15 Sharp Corp メモリセル回路
JP2003109389A (ja) * 2001-09-28 2003-04-11 Fujitsu Ltd 半導体記憶装置
JP2009199675A (ja) * 2008-02-22 2009-09-03 Seiko Instruments Inc 不揮発性半導体記憶装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS528143A (en) * 1976-07-08 1977-01-21 Teijin Ltd Slacken method of thread bunch package

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3618053A (en) * 1969-12-31 1971-11-02 Westinghouse Electric Corp Trapped charge memory cell
US3617775A (en) * 1970-06-03 1971-11-02 James D Allen Circuit for charging the distributed capacitance of a plated wire memory
US4189782A (en) * 1978-08-07 1980-02-19 Rca Corporation Memory organization

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS528143A (en) * 1976-07-08 1977-01-21 Teijin Ltd Slacken method of thread bunch package

Also Published As

Publication number Publication date
JPS6367370B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1988-12-26
US4281400A (en) 1981-07-28

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