JPS6365239U - - Google Patents

Info

Publication number
JPS6365239U
JPS6365239U JP1986160357U JP16035786U JPS6365239U JP S6365239 U JPS6365239 U JP S6365239U JP 1986160357 U JP1986160357 U JP 1986160357U JP 16035786 U JP16035786 U JP 16035786U JP S6365239 U JPS6365239 U JP S6365239U
Authority
JP
Japan
Prior art keywords
input
output
circuit section
pad
output circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1986160357U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1986160357U priority Critical patent/JPS6365239U/ja
Publication of JPS6365239U publication Critical patent/JPS6365239U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/023—Redistribution layers [RDL] for bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の装置の要部平面模式図、第２
図は本考案の部分平面パターン図、第３図及び第
４図は従来装置の要部平面図である。 １，１０…入出力基本セル、２，２０…ボンデ
イングパツド、３，３０…ワイヤ、４，４０…パ
ツケージリード、１１…外回路部、１２…内回路
部。

Claims (1)

    【実用新案登録請求の範囲】
  1. 半導体基板の中央部に適数トランジスタからな
    る内部論理セルを多数行列配置すると共に、周辺
    部に適数トランジスタからなる入出力基本セルを
    複数配列し、さらに外周部に該各入出力基本セル
    に対応する複数のボンデイングパツドを設けたマ
    スタースライス方式の半導体集積回路装置に於い
    て、上記入出力基本セルを内部論理セル側入出力
    回路部と、パツド周辺部側入出力回路部とに分離
    し、半導体基板の周辺角部に上記パツド周辺部側
    入出力回路部とボンデイングパツドとを増設配置
    した事を特徴とする半導体集積回路装置。
JP1986160357U 1986-10-20 1986-10-20 Pending JPS6365239U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986160357U JPS6365239U (ja) 1986-10-20 1986-10-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986160357U JPS6365239U (ja) 1986-10-20 1986-10-20

Publications (1)

Publication Number Publication Date
JPS6365239U true JPS6365239U (ja) 1988-04-30

Family

ID=31085664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986160357U Pending JPS6365239U (ja) 1986-10-20 1986-10-20

Country Status (1)

Country Link
JP (1) JPS6365239U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214188A (ja) * 2006-02-07 2007-08-23 Nec Electronics Corp 半導体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833864A (ja) * 1981-08-25 1983-02-28 Fujitsu Ltd 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5833864A (ja) * 1981-08-25 1983-02-28 Fujitsu Ltd 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007214188A (ja) * 2006-02-07 2007-08-23 Nec Electronics Corp 半導体装置
JP4688158B2 (ja) * 2006-02-07 2011-05-25 ルネサスエレクトロニクス株式会社 半導体装置

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