JPS6362909B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to improving the turn-off capability of gate turn-off thyristors.

Gate turn-off thyristor (hereinafter referred to as
GTO) can turn the current on and off using a gate signal, so when used in inverters and chopper devices, it is easier to use than ordinary thyristors that require forced commutation circuits It can be said to be an attractive semiconductor device because it can be made smaller, lighter, and more efficient. However, when GTO is turned off, the main current conduction area is reduced, so local current concentration tends to occur, making it difficult to turn off large currents.

The problems with conventional GTO are explained below.

FIG. 1 is a cross-sectional view of a conventional high-power GTO element. In FIG. 1, 1 is an n-type base region made of an intermediate layer of an n-type, high-resistivity silicon substrate;
and 3 are p-type emitter regions and p-type emitter regions formed by introducing p-type impurities such as gallium (Ga) into both main surfaces of a silicon substrate by a method such as diffusion.
This is a shape-based area. The region of the silicon substrate into which the p-type impurity is not diffused becomes the n-type base region 1. Reference numeral 4 denotes an n-type emitter region formed on the p-type base region 3 in the form of a plurality of separate and independent islands.
5, 6 and 7 are p-type emitter regions 2,
An anode electrode, a cathode electrode and a gate electrode are in ohmic contact with the n-type emitter region 4 and the p-type base region 3.

Now, considering the GTO turn-off phenomenon,
When a voltage is applied between the turned-on GTO gate electrode 7 and the cathode electrode 6 so that the gate electrode 7 becomes negative, it is carried from the p-type emitter region 2 through the n-type base region 1 to the p-type base region 3. Some of the holes are pulled out from the gate electrode 7, and the npn
When the current amplification factors of the transistor section and the pnp transistor section are α ₁ and α ₂ , respectively, (α ₁ +
When the value of α ₂ ) decreases to less than 1, the GTO becomes unable to maintain conduction and turns off. At this time, turn-off begins to occur in a portion of the n-type emitter region 4 near the gate electrode 7 and spreads to the center of the n-type emitter region 4. For this reason, the blocking region and the conduction region coexist for a certain period during the turn-off period, causing a phenomenon in which current is concentrated in the contracted narrow conduction region and the device is destroyed. The maximum anode current that can be turned off without destroying the device is the controllable anode current (I _TGQ ).

This invention increases the controllable anode current by configuring the n-type emitter region from a low impurity concentration region located in the center and high impurity concentration regions located on both sides of this region. Ta
It is intended to provide GTO.

The present invention will be explained below based on examples.

FIG. 2 is a sectional view of an element of an embodiment of the GTO according to the present invention. In FIG. 2, the same reference numerals as in FIG. 1 represent the same things as shown in FIG. Reference numeral 41 denotes a first region with a high impurity concentration constituting the peripheral part of the n-type emitter region 4 near the gate electrode 7, and numeral 42 denotes a second region with a low impurity concentration constituting the central part of the n-type emitter region 4. . 1st
region 41 is separated by a second region 42 . Note that the surface impurity concentrations of the first region 41 and the second region 42 are 100 times or more and 1 to 100 times the surface impurity concentration of the p-type base region 3, respectively.
It is desirable to double the amount.

Now, the second region 42 of the n-type emitter region 4,
GTO constituted by p-type base region 3, n-type base region 1 and p-type emitter region 2 is AGTO, first region 41 of n-type emitter region 4, p-type base region 3, n-type base region 1 and p-type Let the GTO formed by the emitter region 2 be BGTO. in this case,
The current amplification factor α ^A ₁ of the transistor section constituted by the second region 42 of AGTO, the p-type base region 3 and the n-type base region 1 is the same as that of the first region 41 of BGTO, p
Since the current amplification factor α B of the transistor section constituted by the type base region 3 and the n-type base region 1 is smaller than the current amplification factor α ^B ₁ , when this GTO is turned off, the AGTO
Since the condition of α ₁ + α ₂ <1 is reached before BGTO,
AGTO will be the first area of inhibition. For this reason, while the conventional GTO has a conductive region reduced to the central region of the n-type emitter region 4, in the GTO of the embodiment, the conductive region is reduced to the boundary region between AGTO and BGTO. Compared to the conventional GTO, the GTO of the embodiment has a wider reduced conduction region, so current concentration is relaxed and a large controllable anode current can be obtained.

FIG. 3 is a plan view showing an n-type emitter region of one of the above embodiments. In FIG. 3, reference numeral 41 indicates a first region of high impurity concentration in the n-type emitter region 4, and reference numeral 42, indicated by cross hatching for clarity, indicates a second region of low impurity concentration in the n-type emitter region 4. Here, AGTO separates BGTO into two parts.

In this way, in this embodiment, the high concentration n-type emitter regions 41 are arranged on both sides of the low concentration n-type emitter region 42, sandwiching the low concentration n-type emitter region 42, so that current concentration in the conduction region at the time of turn-off is eliminated. The controllable anode current can be increased by enlarging the reduced conduction area of the electrode, without complicating the manufacturing process.

As detailed above, according to the gate turn-off thyristor according to the present invention, the emitter cathode region is divided into a low impurity concentration region located in the center and high impurity concentration regions located on both sides of this region. Since the reduced conduction region at turn-off is formed in the boundary region between the high impurity concentration region and the low impurity concentration region, the reduced conduction region becomes wider and the controllable anode current increases. Further, since the impurity concentration is simply changed between the high impurity concentration region and the low impurity concentration region, the manufacturing process does not become complicated.

[Brief explanation of drawings]

FIG. 1 is a sectional view of a conventional GTO element, and FIGS. 2 and 3 are a sectional view of an embodiment of a GTO element according to the present invention and a plan view of one n-type emitter region. In the figure, 1 is an n-type base region, 2 is a p-type emitter region, 3 is a p-type base region, 4 is an n-type emitter region, 41 and 42 are the first regions of the n-type emitter region 4 (high impurity concentration region) and the second region (low impurity concentration region), 7 is a gate electrode. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. An n-type base region, a p-type base region, and an n-type emitter region are sequentially formed on the p-type emitter region, and the n-type emitter region is further selectively dug to form the p-type base region. In a gate turn-off thyristor in which a gate electrode is formed on the exposed surface of the n-type emitter region, a low impurity concentration region is formed in the center of the n-type emitter region, and a high impurity concentration region is formed on both sides of the region in contact with the n-type emitter region. A gate turn-off thyristor comprising: 2 The surface impurity concentrations of the high impurity concentration region and the low impurity concentration region of the n-type emitter region are 100% of the surface impurity concentration of the p-type base region, respectively.
2. The gate turn-off thyristor according to claim 1, wherein the gate turn-off thyristor is 1 to 100 times larger.