JPS6362235A - Etching method of semiconductor - Google Patents

Etching method of semiconductor

Info

Publication number
JPS6362235A
JPS6362235A JP20662986A JP20662986A JPS6362235A JP S6362235 A JPS6362235 A JP S6362235A JP 20662986 A JP20662986 A JP 20662986A JP 20662986 A JP20662986 A JP 20662986A JP S6362235 A JPS6362235 A JP S6362235A
Authority
JP
Japan
Prior art keywords
crystal layer
etching
hydrogen peroxide
layer
mixed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20662986A
Other languages
Japanese (ja)
Inventor
Kenji Kunihara
健二 国原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP20662986A priority Critical patent/JPS6362235A/en
Publication of JPS6362235A publication Critical patent/JPS6362235A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To etch only a GaAs crystal layer selectively without etching a mixed crystal layer substantially, by using an aqueous solution of hydrogen peroxide containing ammonia water. CONSTITUTION:A mixed crystal layer AlxGa(1-X)As is made to grow on a GaAs substrate crystal, with the molar fraction of aluminum varied with in a range from x = 0 to x = 0.4, and thereafter each mixed crystal is etched with an etching liquid of a hydrogen peroxide aqueous solution containing ammonia water wherein the ammonia water and hydrogen peroxide solution are mixed in the ratio of 1 to 750. As to the mixture ratio of ammonia with the hydrogen peroxide solution a range between 1 to 750 and 1 to 1500 is practi cal, while the temperature of the etching liquid is preferably within a range from 10 deg.C to 35 deg.C. As the result, the GaAs crystal layer alone is etched selective ly, so that a hetero interface may be exposed exactly and with excellent reproducibility. As a result, fine processing of a hetero junction is facilitated, and thus an element having the hetero junction of the AlxGa(1-x)As mixed layer with the GaAs crystal layer can be manufactured in a stable manner.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 この発明はGaA、基板ないし層とA A! x Ga
 (1x)A3  混晶層とを備える半導体素子の製造
方法にあたり、 GaA、半導体基板ないし層を選択的
に蝕刻する方法に関するものである。
[Detailed description of the invention] [Technical field to which the invention pertains] This invention relates to GaA, a substrate or layer, and AA! xGa
The present invention relates to a method of selectively etching a GaA semiconductor substrate or layer, in a method of manufacturing a semiconductor device comprising a (1x) A3 mixed crystal layer.

〔従来技術とその問題点〕[Prior art and its problems]

皿 近年ゼー■族化合物が可視あるいは赤外領域での発光・
受光素子、又はマイクロ波領域における固体素子として
注目されるようになり、その結晶育成技術も大きな進歩
を遂げ今日では多元素系のへテロ接合もエピタキシャル
成長法で実現されている。とりわけGaA、  結晶上
にkl xoa(1−x )As混晶、さらにその上に
GaAS結晶層と順次エピタキシャル成長法で育成する
ヘテロ接合は、GaA。
In recent years, Z-group compounds have been shown to emit light in the visible or infrared region.
It has attracted attention as a light-receiving device or a solid-state device in the microwave region, and its crystal growth technology has made great progress, and today, multi-element heterojunctions are also realized by epitaxial growth. In particular, a heterojunction grown by an epitaxial growth method in which a klxoa(1-x)As mixed crystal is formed on a GaA crystal, and a GaAS crystal layer is further formed on top of the crystal is a GaA crystal.

結晶とAJxGa(1−x)A、混晶の格子定数および
熱膨張係数が極めて良く合致するため、半導体レーザ、
太陽電池等で注目されている。このような分野において
も、例えば半導体レーザにおけるストライプの形成など
のように素子の機能の向上のためにこれらの結晶を蝕刻
加工する技術が必要であり、微細なパターン形成のため
の蝕刻技術の開発が強く望まれている。
Since the lattice constants and thermal expansion coefficients of the crystal, AJxGa(1-x)A, and the mixed crystal match extremely well, semiconductor lasers,
It is attracting attention for its use in solar cells, etc. Even in these fields, there is a need for etching techniques for these crystals to improve the functionality of devices, such as the formation of stripes in semiconductor lasers, and development of etching techniques for forming fine patterns is needed. is strongly desired.

〔発明の目的〕[Purpose of the invention]

この発明は1肥の点に鑑みてなされたものであり、その
目的とするところは、GaAS基板ないし層とAj’x
Ga(1−x)As混晶層を備える半導体素子の製造に
あたり、前記混晶層は実質的に蝕刻せず、GaAs結晶
層のみを選択的に蝕刻する方法を提供するにある。
This invention was made in view of the above problems, and its purpose is to provide a GaAS substrate or layer and an Aj'x
The present invention provides a method for selectively etching only the GaAs crystal layer without substantially etching the mixed crystal layer when manufacturing a semiconductor device having a Ga(1-x)As mixed crystal layer.

〔発明の要点〕[Key points of the invention]

この発明はGaA5F4晶層の選択蝕刻のためにアンモ
ニア水を含む過酸化水素の水溶液を用いることでその目
的を達する。
The present invention achieves its object by using an aqueous solution of hydrogen peroxide containing aqueous ammonia for selective etching of the GaA5F4 crystal layer.

すなわち、アンモニア水を含む過酸化水素の水溶液を用
いてGaA、を選択的に蝕刻し、AlxGa(1x)A
s混晶層は蝕刻しないようにしたものである。
That is, GaA is selectively etched using an aqueous solution of hydrogen peroxide containing aqueous ammonia to form AlxGa(1x)A.
The s-mixed crystal layer is not etched.

〔発明の実施例〕[Embodiments of the invention]

次にこの発明の実施例を図面にもとづいて説明する。第
2図は混晶層kl xG3(1−x)A、のアルミニウ
ムモル分率Xと蝕刻速度との関係を示す特性図で、これ
は次のようにして求められた。GaA 。
Next, embodiments of the present invention will be described based on the drawings. FIG. 2 is a characteristic diagram showing the relationship between the aluminum mole fraction X of the mixed crystal layer kl x G3 (1-x) A and the etching rate, which was determined as follows. GaA.

基板結晶の上に混晶層AlxG3 (1−X)Asをア
ルミニウムのモル分率Xについてx=0ないしx =0
.4の範囲で変化させて成長させた。混晶を成長させた
あとそれぞれの混晶をアンモニア水(28重量%)と過
酸化水素水(30重量%)を1対750の割合で混合し
たアンモニア水を含む過酸化水素水溶液の蝕刻液(液温
26℃)で蝕刻し、その蝕刻速度を調べた。アンモニア
水と過酸化水素水の混合割合としては1対750ないし
1対1500の範囲が実用的であり、蝕刻液の温度とし
ては10℃ないし35℃の範囲が好適である。アンモニ
ア水を含む過酸化水素水溶液を蝕刻液として用いると、
混晶A/ z G a (1x )A 5のアルミニウ
ムモル分率Xが大きくなるにつれ、蝕刻速度が急速に低
下する。この事実を応用するとGaAs結晶層とAlx
Ga(1−x)As混晶層のへテロ接合に対する微細加
工が容易になる。
A mixed crystal layer AlxG3(1-X)As is formed on the substrate crystal at a molar fraction of aluminum of x=0 to x=0.
.. It was grown by varying the range of 4. After growing the mixed crystals, each mixed crystal was treated with an etching solution of a hydrogen peroxide aqueous solution containing ammonia water (28% by weight) and hydrogen peroxide solution (30% by weight) mixed in a ratio of 1:750. Etching was performed at a liquid temperature of 26° C.), and the etching speed was examined. A practical mixing ratio of aqueous ammonia and aqueous hydrogen peroxide is from 1:750 to 1:1,500, and the temperature of the etching solution is preferably from 10°C to 35°C. When a hydrogen peroxide aqueous solution containing aqueous ammonia is used as an etching solution,
As the aluminum mole fraction X of the mixed crystal A/z Ga (1x) A 5 increases, the etching rate rapidly decreases. Applying this fact, GaAs crystal layer and Alx
Microfabrication of the heterojunction of the Ga(1-x)As mixed crystal layer becomes easy.

次に上記結果をヘテロ接合の微細加工に適用した実験例
を示す。第3図はAlxGa(1−X ) A、混晶と
GaA、結晶のへテロ接合に対する蝕刻時間と蝕刻深さ
との関係を示す株図でこれは次のようにして求められた
。oaAs基板結晶上に0.2μm厚のAJo、4Ga
(0,6)As混晶と、062μm 厚のGaA3結晶
を順次エビタキレヤル成長させ、温度26℃のアンモニ
ア水を過酸化水素水溶液で蝕刻し、蝕刻時間と蝕刻深さ
との関係を調べた。0.2μm厚のGaA3層(72図
のklxG3(1−x)A、においてX=Oに相当)は
約3分弱で蝕刻されるが、ここでヘテロ接合界面のAl
o、4Ga(0,6)A、混晶層が露出し、以後はけ刻
が進まず、ヘテロ接合界面か安定に維持されていること
がわかる。さらにAJ O,40a(0,6)As混晶
層も蝕刻するときは周知の蝕刻液、例えばH20□;H
3PO4;エチレングリコール=1;1;6の蝕刻液を
用いることができる。
Next, we will show an experimental example in which the above results are applied to microfabrication of heterojunctions. FIG. 3 is a diagram showing the relationship between etching time and etching depth for heterojunctions of AlxGa(1-X)A, mixed crystal and GaA crystal, and was determined as follows. 0.2μm thick AJo, 4Ga on oaAs substrate crystal
A (0,6)As mixed crystal and a 062 μm thick GaA3 crystal were sequentially grown by epitaxy, and aqueous ammonia at a temperature of 26° C. was etched with an aqueous hydrogen peroxide solution, and the relationship between etching time and etching depth was investigated. The 0.2 μm thick GaA3 layer (corresponding to
It can be seen that the mixed crystal layer of 0,4Ga(0,6)A is exposed, and the chipping does not proceed thereafter, and the heterojunction interface is maintained stably. Furthermore, when etching the AJ O,40a(0,6)As mixed crystal layer, a well-known etching solution such as H20□;
An etching solution containing 3PO4; ethylene glycol = 1; 1; 6 can be used.

次に上記の検討結果をGaA、ダブルヘテロレーザ素子
の製造に応用する。この場合AlxGa(1−X)A8
.混晶層とGaA、結晶層のへテロ接合に対しGaA、
結晶層を選択的に蝕刻し、レーザ発振に必要なストライ
プの形成が行なわれた。第1図はSAS(SelfAl
inged 5tructure )構造を有するGa
A、ダブル5テロレーザ素子の製作順の模式断面図であ
る。第1図(a)に示すようにn型GaA、基板結晶1
に、厚さ1μmのGaA、結晶層(バッファ層)2,1
.5μm厚のn型AA!0.31Ga(0,69)A。
Next, the above study results will be applied to the production of a GaA double hetero laser device. In this case AlxGa(1-X)A8
.. GaA to the mixed crystal layer, GaA to the heterojunction of the crystal layer,
The crystal layer was selectively etched to form stripes necessary for laser oscillation. Figure 1 shows SAS (SelfAl
inged 5structure) structure
A is a schematic cross-sectional view of the manufacturing order of the double 5-terror laser device. As shown in FIG. 1(a), an n-type GaA substrate crystal 1
1 μm thick GaA crystal layer (buffer layer) 2,1
.. 5μm thick n-type AA! 0.31Ga(0,69)A.

混晶層(クラッド層)3,0.1sn厚のGaA3結晶
層(活性層)4,0.2細厚のPwAlO031Ga(
0,69)As混晶層(クラッド層)5,0.4μm厚
のn型GaA、結晶層(電流阻止層)6を順次エピタキ
シャル成長させたのち、耐蝕性マスクとして感光性樹脂
7を載せ、これに周知の写真蝕刻技術を用いて、巾8μ
mの開孔8aを設ける。続いてアンモニア水を含む過酸
化水素水溶液(1; 750)を用いて約5分間蝕刻し
、開孔8aに対応するn型GaAs結晶層(電流阻止層
)6が完全に除去されて、開孔8bのストライプとなり
、p型AI0.31Ga(0,69)A、混晶層(クラ
ッド層)5が開孔8bに露出する(第1図(b))。ウ
エノ1面内でのエピタキシャル層の膜厚のバラツキある
いは蝕刻深さのバラツキを勘案すると、約1分間程度過
蝕刻することが望ましい。その際この蝕刻液はAIo、
31Ga(0,69)人、混晶に対し、0.01 a 
m/m i nの蝕刻速度であるから、上記1分間の過
蝕刻は何らの影響を及ぼさない。開孔8bを設けたのち
に耐蝕マスクとしての感光性樹脂7を除き、開孔8bの
設けられたn型GaA、結晶層(電流阻止層)6の上に
1.5μm厚のp型AlO,31Ga(0,69)A、
混晶層(クラッド層)5および0.5 tRn  厚の
p型GaA、結晶層(コンタクト層)9を順次エピタキ
シャル成長させ、さらにAuzn電極10とAuGeN
i電極11を蒸着法で形成して、8A8構造のGaAs
ダブルへテロレーザ素子を得た(第1図(C))。以上
のように確実にn型GaA、結晶層6の所定部分を除去
し、しかもp型AA! 0.310a(0,69)As
混晶層5で蝕刻を停止する蝕刻技術はエピタキシャル成
長による膜厚のバラツキを考慮した場合、SAS構造の
GaAsダブルへテロレーザダイオードを安定に製作す
るための必須要件であり、本発明はこの必須要件を満足
させるものである。
Mixed crystal layer (cladding layer) 3, 0.1 sn thick GaA3 crystal layer (active layer) 4, 0.2 thin thick PwAlO031Ga (
0,69) After epitaxially growing an As mixed crystal layer (cladding layer) 5, a 0.4 μm thick n-type GaA layer, and a crystal layer (current blocking layer) 6, a photosensitive resin 7 was placed as a corrosion-resistant mask. Using well-known photo-etching technology, the width of 8μ
An opening 8a having a diameter of m is provided. Subsequently, etching was performed for about 5 minutes using a hydrogen peroxide aqueous solution (1; 750) containing aqueous ammonia, and the n-type GaAs crystal layer (current blocking layer) 6 corresponding to the opening 8a was completely removed and the opening was removed. 8b, and the p-type AI0.31Ga(0,69)A and mixed crystal layer (cladding layer) 5 are exposed in the opening 8b (FIG. 1(b)). Considering variations in the film thickness of the epitaxial layer or variations in the etching depth within one surface of the wafer, it is desirable to over-etch for about 1 minute. At that time, this etching solution was AIo,
31Ga(0,69) person, 0.01 a for mixed crystal
Since the etching speed is m/min, the over-etching for one minute has no effect. After forming the openings 8b, the photosensitive resin 7 as a corrosion-resistant mask is removed, and on the n-type GaA layer with the openings 8b, the p-type AlO layer with a thickness of 1.5 μm, and the crystal layer (current blocking layer) 6. 31Ga(0,69)A,
A mixed crystal layer (cladding layer) 5, a p-type GaA layer with a thickness of 0.5 tRn, and a crystal layer (contact layer) 9 are epitaxially grown, and then an AuZn electrode 10 and an AuGeN layer are grown.
The i-electrode 11 is formed by a vapor deposition method and is made of GaAs with an 8A8 structure.
A double hetero laser device was obtained (FIG. 1(C)). As described above, the n-type GaA and predetermined portions of the crystal layer 6 are reliably removed, and the p-type AA! 0.310a(0,69)As
The etching technique that stops etching at the mixed crystal layer 5 is an essential requirement for stably manufacturing a GaAs double hetero laser diode with an SAS structure, taking into account the variation in film thickness due to epitaxial growth, and the present invention solves this essential requirement. It satisfies the following.

なおこの発明にかかわる蝕刻技術は、レーザダイオード
ばかりでなく、GaASを用いたヘテロ接合ショットキ
ーゲート構造の電界効果トランジスタ等にも適用できる
ものである。
The etching technique according to the present invention can be applied not only to laser diodes but also to field effect transistors having a heterojunction Schottky gate structure using GaAS.

〔発明の効果〕〔Effect of the invention〕

l)この発明によればGaA3半導体AlxGa (1
−x )A5 混晶層で形成される半導体素子の製造に
あたりアンモニア水を含む過酸化水素の水溶液を用いた
ので、GaA、結晶層のみが選択的に蝕刻されてヘテロ
界面が正確にかつ再現性良く露出することとなり、その
結果へテロ接合の微細加工が容易となって、AAzGa
 (1−x)A、混晶1とGaA、結晶層のへテロ接合
を有する素子を安定に製造することが可能となる。
l) According to this invention, GaA3 semiconductor AlxGa (1
-x) A5 Since an aqueous solution of hydrogen peroxide containing aqueous ammonia was used to manufacture a semiconductor device formed of a mixed crystal layer, only the GaA and crystal layers were selectively etched, making the hetero interface accurate and reproducible. As a result, the microfabrication of the heterojunction becomes easy, and the AAzGa
It becomes possible to stably manufacture an element having a heterojunction of (1-x)A, mixed crystal 1, GaA, and a crystal layer.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の実施例のSAS構造を有するGaA
、ダブルへテロレーザダイオードの製作類の模式断面図
で(a)はへテロ接合にホトレジストを形成した段階の
断面図、(b)はアンモニア水を含む過酸化水素の水溶
液でn型GaA3結晶層を蝕刻してストライプを形成し
た段階の断面図、(C)は完成した8kB構造のGaA
、ダブルへテロレーザ素子の断面図、第2図はこの発明
の実施例のAIXGa(1x)As混晶の蝕刻速度のX
依存性を示す特性図、第3図はこの発明の実施例のhl
 −g G B (1−x ) A B混晶層(x=+
0.4 )とGaA、  結晶層のへテロ接合lこ対す
る蝕刻時間と蝕刻深さの関係を示す線図である。 1−GaA、基板、5−p型Al)(Ga(1”)’s
混晶層、6・・・n型GaAs結晶層、7・・感光性樹
脂、8a・・・開孔、8b・・・開孔。 X (All)xGa(1−x)As)工、1.+シダ
時間(min)
FIG. 1 shows GaA having a SAS structure according to an embodiment of the present invention.
, is a schematic cross-sectional view of the fabrication of a double hetero laser diode, (a) is a cross-sectional view at a stage where photoresist is formed on the heterojunction, and (b) is an n-type GaA3 crystal layer formed with an aqueous solution of hydrogen peroxide containing aqueous ammonia. (C) is a cross-sectional view of the completed 8kB structured GaA
, a cross-sectional view of a double hetero laser element, and FIG.
A characteristic diagram showing dependence, FIG. 3 is hl of an embodiment of this invention.
-g G B (1-x) A B mixed crystal layer (x=+
0.4) and GaA, and is a diagram showing the relationship between etching time and etching depth for a heterojunction of a crystal layer. 1-GaA, substrate, 5-p-type Al) (Ga(1”)'s
Mixed crystal layer, 6... n-type GaAs crystal layer, 7... photosensitive resin, 8a... opening, 8b... opening. X (All)xGa(1-x)As) Engineering, 1. +Fern time (min)

Claims (1)

【特許請求の範囲】 1)GaAs基板ないし層とAlxGa(1−x)As
混晶層を備える半導体素子の製造にあたり、アンモニア
水を含む過酸化水素の水溶液を用いてGaAs基板ない
し層のみを選択的に蝕刻することを特徴とする半導体の
蝕刻方法。 2)特許請求の範囲第1項記載の蝕刻方法において、ア
ンモニア水と過酸化水素水の比が1対750ないし1対
1500のアンモニア水を含む過酸化水素の水溶液を用
いることを特徴とする半導体の蝕刻方法。 3)特許請求の範囲第1項記載の蝕刻方法において、温
度10℃ないし35℃のアンモニア水を含む過酸化水素
の水溶液を用いてGaAs基板ないし層を蝕刻すること
を特徴とする半導体の蝕刻方法。
[Claims] 1) GaAs substrate or layer and AlxGa(1-x)As
1. A method for etching a semiconductor, which comprises selectively etching only a GaAs substrate or layer using an aqueous solution of hydrogen peroxide containing aqueous ammonia in the production of a semiconductor device having a mixed crystal layer. 2) In the etching method according to claim 1, an aqueous solution of hydrogen peroxide containing aqueous ammonia and having a ratio of aqueous ammonia to aqueous hydrogen peroxide of 1:750 to 1:1,500 is used. Etching method. 3) A semiconductor etching method according to claim 1, characterized in that the GaAs substrate or layer is etched using an aqueous solution of hydrogen peroxide containing aqueous ammonia at a temperature of 10° C. to 35° C. .
JP20662986A 1986-09-02 1986-09-02 Etching method of semiconductor Pending JPS6362235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20662986A JPS6362235A (en) 1986-09-02 1986-09-02 Etching method of semiconductor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20662986A JPS6362235A (en) 1986-09-02 1986-09-02 Etching method of semiconductor

Publications (1)

Publication Number Publication Date
JPS6362235A true JPS6362235A (en) 1988-03-18

Family

ID=16526531

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20662986A Pending JPS6362235A (en) 1986-09-02 1986-09-02 Etching method of semiconductor

Country Status (1)

Country Link
JP (1) JPS6362235A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5279704A (en) * 1991-04-23 1994-01-18 Honda Giken Kogyo Kabushiki Kaisha Method of fabricating semiconductor device
US5419808A (en) * 1993-03-19 1995-05-30 Mitsubishi Denki Kabushiki Kaisha Etching solution and etching method for semiconductors
EP0713247A2 (en) 1994-11-18 1996-05-22 Honda Giken Kogyo Kabushiki Kaisha Method of fabricating semiconductor device and method of fabricating high-frequency semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5279704A (en) * 1991-04-23 1994-01-18 Honda Giken Kogyo Kabushiki Kaisha Method of fabricating semiconductor device
US5419808A (en) * 1993-03-19 1995-05-30 Mitsubishi Denki Kabushiki Kaisha Etching solution and etching method for semiconductors
EP0713247A2 (en) 1994-11-18 1996-05-22 Honda Giken Kogyo Kabushiki Kaisha Method of fabricating semiconductor device and method of fabricating high-frequency semiconductor device
EP0713247A3 (en) * 1994-11-18 1996-08-07 Honda Motor Co Ltd Method of fabricating semiconductor device and method of fabricating high-frequency semiconductor device
US5770525A (en) * 1994-11-18 1998-06-23 Honda Giken Kogyo Kabushiki Kaisha Method of fabricating semiconductor device and method of fabricating high-frequency semiconductor device

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