KR100813561B1 - semiconductor substrate and the manufacturing method of the same - Google Patents

Abstract

 A substrate and a semiconductor thin film grown on one surface of the substrate, wherein the substrate is removed by back polishing, wet etching or dry etching to provide a self-supporting semiconductor substrate having a compound semiconductor thin film independently and a method of manufacturing the same. .

Nitride-based semiconductors, free-standing semiconductor substrates, light emitting diodes, electronic devices, laser diodes

Description

Semiconductor substrate and the manufacturing method of the same

1 is a nitride semiconductor thin film structure grown with HVPE on a sapphire base substrate.

2 is a nitride semiconductor thin film structure grown by MOCVD after growing a nitride semiconductor thin film with HVPE on a sapphire base substrate.

3 is a nitride semiconductor thin film structure grown by MOCVD after growing a nitride semiconductor thin film with HVPE on a patterned sapphire base substrate.

4 is a nitride semiconductor thin film structure re-grown by MOCVD after forming a SiO or SiN cluster on the sapphire base substrate and growing a nitride semiconductor thin film with HVPE.

5 is a nitride semiconductor thin film structure grown by MOCVD on a sapphire base substrate and grown on a nitride semiconductor thin film by HVPE.

6 is a nitride semiconductor thin film structure grown by MOCVD on a patterned sapphire base substrate and grown on a nitride semiconductor thin film by HVPE, and then grown again by MOCVD.

7 is a view showing a manufacturing process of a semiconductor substrate according to the first embodiment of the present invention.

8 is a graph showing the relationship between the etch rate of sapphire and GaN by ICP / RIE dry etching;

9 is a graph showing the etching rate when wet etching sapphire and GaN with a sulfuric acid and phosphoric acid mixed solution.

10 is a surface photograph of a nitride semiconductor after removing a sapphire substrate by a wet etching method.

FIG. 11 is a view showing a cross-sectional photograph when the sapphire substrate having a pattern of various line widths is etched with a solution of sulfuric acid and phosphoric acid mixed.

12 is a surface photograph of a nitride semiconductor layer after removing a sapphire substrate by a wet etching method.

13 is a view showing a manufacturing process of a semiconductor substrate according to the third embodiment of the present invention.

14 is a view showing a manufacturing process of a semiconductor substrate according to the fourth embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

11 sapphire substrate

In _x (Ga _y Al _{1 -y} ) N layer grown to 12 VPE

13 In _x (Ga _y Al _{1 -y} ) N layer grown by MOCVD

14 SiO ₂ or SiN _x cluster

15 Shield

16 Nutritic metal on the nitride semiconductor side

Nutraceutical metal on 17 Si substrate

18 Si substrate

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate and a method of manufacturing the same. More particularly, the present invention provides a self-supporting semiconductor substrate (hereinafter referred to as a semiconductor substrate) from which a sapphire substrate used as a base substrate is grown to grow a nitride semiconductor. The present invention relates to a self-supporting semiconductor substrate and a method of manufacturing the same, which makes it possible to easily fabricate a nitride-based semiconductor device having a high quality thin film with low crystal defects and excellent vertical electrode structure by growing a nitride semiconductor on a substrate.

The base substrate is determined by the type of thin film to be grown. If the lattice constant between the base substrate and the thin film grown on the base substrate is different, crystal defects are caused by the lattice constant difference between the base substrate and the thin film. This is because the film quality worsens. In order to improve this problem, AlGaP, GaP / AlP heterojunction structure is grown on GaP substrate, InP, InGaAs and GaAs substrate are grown on InP substrate.

In particular, even in the case of GaN (nitride semiconductor), a sapphire base substrate having a similar lattice constant to GaN is mainly used to reduce lattice defects. However, unlike GaP, InP, Si, and GaAs semiconductor substrates, sapphire substrates cannot form conductive substrates by the addition of impurities, which makes it difficult to manufacture vertical electrode light emitting diodes and vertical electrode laser diodes. It should be formed on the growth surface side of the epi layer (planar electrode formation).

Thus, if both electrodes are formed on the same surface, the area of the two electrodes required for wire bonding must be secured on one surface, so that the chip area of the light emitting diode is also larger than a predetermined size, which impedes the improvement of chip production per wafer. In addition, since the insulator is used as a substrate, it is difficult to discharge static electricity flowing from the outside, which causes a high possibility of causing a defect due to static electricity. This introduces several limitations in the packaging process, such as lowering device reliability and adding zener diodes. In addition, since sapphire has low thermal conductivity, it is difficult to dissipate heat generated during driving of the light emitting diodes to the outside, thereby limiting the application of a large current for high power.

In addition, in order to obtain laser oscillation gain, it is important to obtain the surface of the resonator with excellent reflection characteristics. Since the sapphire base substrate is hard, it is not easy to process and difficult to form the cleavage surface, so it is not easy to manufacture the laser diode of excellent performance. Although industrial value is recognized, manufacturing costs are expensive and are not widely used. In particular, high value-added electronic devices, such as HBT (hetero bipolar transistor), have to make vertical electrode type, but it has been known that the sapphire substrate is not easy to manufacture because it is not easy to process. To solve this problem, it is necessary to grow a nitride semiconductor on a nitride semiconductor basic substrate, which is easy to process, but it is not easy to manufacture a substrate.

In order to manufacture a nitride based semiconductor substrate, a method of separating a sapphire base substrate using a laser lift-off technique has been used. However, the laser lift-off technique has complicated manufacturing costs and methods such as the use of expensive equipment equipped with a high power excimer laser, has a problem in mass production, and various problems such as damage to the surface of the semiconductor substrate due to heat during the process. This has been raised.

The present invention provides a semiconductor substrate and a method of manufacturing the same, which provide a self-standing semiconductor substrate from which a base substrate has been removed, thereby providing a vertical electrode type semiconductor device having low crystal defects and excellent performance. It aims to provide.

In addition, an object of the present invention is to provide a semiconductor substrate manufacturing process that can be used more easily in removing the base substrate.

In order to achieve the above object, the present invention provides a semiconductor substrate comprising a semiconductor layer grown on the base substrate, the semiconductor layer is formed separately from the base substrate do.

Preferably, the base substrate is partially separated from the semiconductor layer, and the base substrate may be formed from any one of sapphire (Al ₂ O ₃ ), GaP, GaAs, Si, SiC, AlN. More preferably, the thickness of the base substrate is 50um to 800um, the crystal growth surface of the sapphire (Al ₂ O ₃ ) may be made of any one of the C, M, A, R surface. More preferably, the sapphire base substrate is characterized in that the pattern is formed in at least one of the x or y direction.

Preferably, the semiconductor layer is a nitride-based semiconductor layer, the semiconductor layer comprises a layer formed of at least one In _x (Ga _y Al _{1 -y} ) N layer, wherein 1≥x≥0, 1≥y ≧ 0, x + y> 0. At this time, the thickness of the semiconductor layer is preferably 10um to 500um. In addition, the semiconductor layer may include vapor phase epitaxy (VPE), hydrogen vapor phase epitaxy (HVPE), metal organic chemical vapor deposition (MOCVD), metal organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), and low pressure LPCVD. It is preferably grown by any one or a combination of chemical vapor deposition (LPE), liquid phase epitaxy (LPE).

More preferably, the semiconductor layer is any one of a high resistance, n-type, and p-type semiconductor layer, wherein the doping concentration of the high resistance is 10E17 / cm ³ or less, and the n-type semiconductor layer is Sidl doped And the p-type semiconductor layer is Mg doped, and the doping concentration is more preferably 10E18 / cm ³ or more so that the contact resistance is 1E-1Ωcm ² .

In addition, the present invention is grown on the base substrate, the etch stop layer for removing the base substrate by etching; And a semiconductor layer formed on the etch stop layer.

Preferably, the base substrate may be partially removed to expose a portion of the etch stop layer through the base substrate. More preferably, the base substrate may be formed from any one of sapphire (Al ₂ O ₃ ), GaP, GaAs, Si, SiC, AlN. At this time, the thickness of the base substrate is preferably 50um to 800um. In addition, the crystal growth surface of the sapphire (Al ₂ O ₃ ) is characterized by consisting of any one of the C, M, A, R surface. More preferably, the sapphire base substrate may be formed with a pattern in at least one of the x or y direction.

Preferably, the semiconductor layer and the etch stop layer are nitride-based semiconductor layers. In this case, the nitride-based semiconductor layer includes a layer formed of at least one In _x (Ga _y Al _{1 -y} ) N, wherein 1≥x≥0, 1≥y≥0, x + y> 0 do. In addition, the thickness of the nitride-based semiconductor layer is more preferably 10um to 500um, the nitride-based semiconductor layer is VPE (vapor phase epitaxy), HVPE (hydrogen vapor phase epitaxy), MOCVD (metal organic chemical vapor deposition), MOVPE ( metal organic vapor phase epitaxy (MBE), molecular beam epitaxy (MBE), low pressure chemical vapor deposition (LPCVD), liquid phase epitaxy (LPE), or a combination thereof. In addition, the nitride-based semiconductor layer may be any one of a high resistor, an n-type, and a p-type semiconductor layer.

In addition, the present invention a. Providing a base substrate formed from any one of sapphire (Al ₂ O ₃ ), GaP, GaAs, Si, SiC, and AlN; b. Forming a semiconductor layer on the base substrate; c. Forming a protective film on the semiconductor layer; d. Lapping and polishing the base substrate to remove the base substrate from the semiconductor layer; And e. It provides a method for manufacturing a semiconductor substrate comprising the step of etching to remove the protective film.

Preferably, the d step is to remove the base substrate from the semiconductor layer by etching again while leaving the base substrate thin in the lapping and polishing step. The etching in step d is hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), chromium oxide ( It is preferably carried out by a wet etching method using a mixed solution of CrO ₃ ) and allues (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O) or a combination thereof as an etchant. More preferably, the semiconductor layer is used as an etch stop layer in the wet etching.

The semiconductor layer may include In _x (Ga _y Al _{1 -y} ) N (1≥x≥0, 1≥y≥0, x + y> 0) or a silicon oxide cluster or a silicon nitride cluster (SiO ₂ or SiN _x cluster). At least one of the layers. In addition, the etchant is characterized in that it is used in a heated state at a temperature of 100 ℃ or more. In this case, the heating is characterized in that the indirect heating method using the light absorption.

In addition, in the d step, the etching may be performed by dry etching using ICP / RIE or RIE. At this time, the dry etching is characterized in that using at least one of BCL ₃ , Cl ₂ , HBr, Ar as an etching gas.

Preferably, the surface roughness of the base substrate is mirror-polished so that the surface roughness is 20 μm or less during lapping and polishing in step d, and the thickness of the base substrate after lapping and polishing in step d is 300 μm or less. It features. Preferably the lapping and polishing of step d is mechanical polishing, chemical mechanical polishing (CMP) and hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), Phosphoric acid (H ₃ PO ₄ ), chromium oxide (CrO ₃ ), water (H ₂ O), and allues (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O) or any of these It is characterized by using at least one method of wet etching using the mixed solution by combination as an etching liquid.

Also preferably, the protective film is SiO ₂ Or SOG (spin-on-glass).

In addition, the present invention a. Providing a base substrate formed from any one of sapphire (Al ₂ O ₃ ), GaP, GaAs, Si, SiC, and AlN; b. Forming a semiconductor layer on the base substrate; c. Forming a protective film on the semiconductor layer; d. Attaching an auxiliary substrate on the protective film; e. Lapping and polishing the base substrate to remove the base substrate from the semiconductor layer; And f. It provides a method for manufacturing a semiconductor substrate comprising the step of etching to remove the protective film.

Preferably, the auxiliary substrate may be an insulating substrate. Also preferably, the auxiliary substrate is a semiconductor substrate.

Attachment of the auxiliary substrate may be made using a neutronic metal as an adhesive means. In this case, the nuttic metal is made of any one or combination of In, Ni, Pd, Au, Ti, Pt, Rh group.

In addition, the present invention a. Providing a base substrate formed from any one of sapphire (Al ₂ O ₃ ), GaP, GaAs, Si, SiC, and AlN; b. Forming an etch stop layer on the base substrate; c. Forming a semiconductor layer on the etch stop layer; d. Forming a protective film on the semiconductor layer; e. Etching and removing the base substrate; And f. It provides a method for manufacturing a semiconductor substrate comprising the step of etching to remove the protective film.

Preferably, the etching in step e is hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), oxidation Wet using a mixed solution of any one or a combination of chromium (CrO ₃ ), water (H ₂ O) and aloe etch (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O) as an etchant It may be performed by an etching method.

Also preferably, the etch stop layer and the semiconductor layer may be formed of In _x (Ga _y Al _{1 -y} ) N (1≥x≥0, 1≥y≥0, x + y> 0) or a silicon oxide cluster or a silicon nitride cluster. (SiO ₂ or SiN _x cluster).

In addition, the etchant is preferably used in a heated state at a temperature of 100 ℃ or more, wherein the heating is more preferably made of an indirect heating method using light absorption.

Preferably, the etching in step e may further include a dry etching method using at least one of BCL ₃ , Cl ₂ , HBr, Ar as an etching gas.

In addition, during lapping and polishing in step e, the surface of the base substrate may be mirror polished to have a surface roughness of 20 μm or less, and the thickness of the base substrate after lapping and polishing in step e may be 300 μm or less. . Preferably, the protective film is SiO ₂ Or it is formed of any one of spin-on-glass (SOG).

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

Semiconductor layer  formation

1 is a 200 μm thick In _x (Ga _y Al _1-y ) N nitride semiconductor layer grown on a 430 μm thick sapphire base substrate (Sapphire, Al ₂ O ₃ ) substrate by hydride vapor phase epitaxy (HVPE). It is shown. The composition ratio of the nitride semiconductor is 1≥x≥0 and 1≥y≥0. The nitride-based semiconductor layer is grown by metal organic chemical vapor deposition, liquid phase epitaxy, molecular beam epitaxy, or metal organic vapor phase epitaxy. It is also possible.

The thickness of the grown nitride-based semiconductor layer may be thick so as to easily handle the semiconductor substrate during the regrowth process and device fabrication process of the nitride-based semiconductor layer, which will be described later, and when the base substrate is thin, the lattice constant between the sapphire and the nitride semiconductor, which is the base substrate, 10um to 500um is preferable because there is a problem that the substrate on which the nitride-based semiconductor is grown due to the stress caused by the difference and the risk of breaking the substrate during the growth.

The film quality of nitride semiconductors grown with HVPE is worse than that grown with metal organic chemical vapor deposition (MOCVD), but the growth rate is 100um / hr per hour, so mass production is easy and manufacturing cost can be reduced. It is preferable that the thick nitride-based semiconductor thin film to be removed to become a freestanding semiconductor substrate grows with HVPE. Therefore, a nitride semiconductor layer is grown by HVPE at 900 ° C. using ammonia (NH 4), trimethyl gallium, and trimethyl aluminum. The grown nitride semiconductor layer may be grown in a single layer or in multiple layers depending on the type of device to be manufactured, and an impurity is added to any one or a plurality of elements of Si, Mg, Sn, and Zn groups so as to have a conductive property. At the time of addition of Si, an n-type nitride semiconductor layer or at the time of Mg addition can be formed into a p-type nitride semiconductor layer. Here, in order to easily grow the nitride semiconductor thin film crystals, an n-type nitride semiconductor having a thickness of 200 μm was grown by doping Si.

FIG. 2 shows In _x (Ga _y Al _1-y ) _by MOCVD on a 200 μm thick In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer grown with a hydride vapor phase epitaxy (HVPE) on a 500 μm thick sapphire base substrate. Re-grown N nitride semiconductor layer is shown. The composition ratio of the nitride semiconductor thin film is x≥0 and y≥0. As described above, the nitride-based semiconductor layer grown with HVPE may be grown in a single layer or a plurality of layers depending on the type of device to be manufactured, and any one or a plurality of elements of Si, Mg, Sn, and Zn groups may be formed to have a conductive property. N-type nitride semiconductor layer by adding impurities Or a p-type nitride semiconductor layer. The doping concentration may vary depending on the type of doping element about 10E15 / cm ³ to 10E21 / cm ³ to be produced.

In addition, the nitride-based semiconductor layer regrown on the HVPE-grown thin film may be grown in a single layer or in multiple layers depending on the type of device to be manufactured. To produce a light emitting diode, an n-type conductive nitride semiconductor layer having a thickness of 2um to 5um, an n-type cladding layer of 0.5um, a light emitting layer of 0.5um, a p-type cladding layer of 0.5um, and a p-type conductive nitride semiconductor layer of 0.2um Grow up. When manufacturing a hetero bipolar transistor (HBT), an n-type emitter, a base, and a p-type collector are grown. The light emitting layer may be slightly different depending on the light emitting diode, laser diode, or light emitting wavelength, but the quantum well structure of In _x (Ga _y Al _1-y ) N / In _x (Ga _y Al _1-y ) N is selected. . The composition ratio of In _x (Ga _y Al _{1 -y} ) N allows the well layer to have a smaller energy bend gap than the barrier layer, and may grow an In0.1Ga0.9N / GaN type quantum well structure, and In0.1Ga0. You can also grow 9N / Al0.1Ga0.9N.

Figure 3 is a _{In x (Ga y Al 1 -y} ) N nitride semiconductor layer, and growing a _{MOCVD In x (Ga y Al 1} -y) HVPE (hydride vapor phase epitaxy) on a patterned sapphire base substrate N nitride semiconductor layer It shows the regrowth. The composition ratio of the nitride semiconductor is x≥0 and y≥0. The detailed structure is similar to that of FIG. 2, except that the nitride-based semiconductor is grown using a patterned sapphire base substrate. The patterned sapphire base substrate is advantageous to minimize the lattice defects by minimizing the stress between the base substrate and the nitride semiconductor when growing a nitride-based semiconductor thin film on the sapphire base substrate. The number of lattice defects of nitride semiconductors grown without phantoms was about 10E10 / cm ² , but when patterned substrates are employed, they can be reduced by about 10E8 / cm ² .

FIG. 4 illustrates a fine cluster formed of any one or a combination of SiO and SiN groups having a thickness of about 10A on a sapphire base substrate, and then 100 μm of In _x (Ga _y Al _{1 −} ) using a hydride vapor phase epitaxy (HVPE). _y ) N nitride semiconductor layer was grown and 5um of In _x (Ga _y Al _{1- y} ) N nitride semiconductor layer was regrown by MOCVD. The other detailed structure is similar to the examples described above, except that the microstructure of SiN or SiO is formed before growing the nitride semiconductor with HVPE.

Such SiN or SiO microstructures can be used as a stop layer for wet etching when minimizing the stress between the sapphire base substrate and the nitride semiconductor layer, thereby improving the nitride semiconductor film quality and removing the sapphire substrate using wet etching described below. . The wafer coverage covering the SiN or SiO microstructure sapphire base substrate should be 90% or less. The reason is that when the SiN or SiO fine structure covers the entire sapphire substrate, the sapphire on which the nitride is to be grown is not exposed and the nitride semiconductor is not grown.

5 is approximately 2um by MOCVD on the sapphire base substrate _{In x (Ga y Al 1 -y} ) growing a nitride semiconductor and N HVPE (hydride vapor phase epitaxy) of 200um of _{In x (Ga y Al 1-} y) material growth by The growth of a 5um In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer by MOCVD is again shown on the N nitride semiconductor layer. The composition ratio of the nitride semiconductor is x≥0 and y≥0.

The reason why the nitride semiconductor is grown on the sapphire substrate by MOCVD is that even if the nitride semiconductor is grown thick with HVPE, threading crystal dislocation cannot be removed or reduced. In order to overcome this problem, the nitride semiconductor is grown on the sapphire substrate by MOCVD to minimize crystal bonds, thereby reducing the penetration lattice defect generated when growing the nitride semiconductor with HVPE.

As shown in the above description, the nitride-based semiconductor layer grown with HVPE may be grown in a single layer or in multiple layers according to the type of device to be manufactured, and any one or a plurality of Si, Mg, Sn, and Zn groups may have a conductive property. An impurity of an element of can be added to form an n-type nitride semiconductor layer or a p-type nitride semiconductor layer.

FIG. 6 shows 100 μm of In _x (Ga _y ) grown on a patterned sapphire base substrate by about 2 μm of In _x (Ga _y Al _1-y ) N nitride semiconductor which is not doped by MOCVD and regrown with a hydride vapor phase epitaxy (HVPE). It is shown that the In _x (Ga _y Al _{1- y} ) N nitride semiconductor layer is regrown by MOCVD on the Al _{1 -y} ) N nitride semiconductor layer again. Here again, the composition ratio of the nitride semiconductor is x≥0 and y≥0. The reason why the nitride semiconductor is grown by MOCVD on the patterned sapphire substrate is that even if the nitride semiconductor is grown thick with HVPE as described above, threading crystal dislocation cannot be removed or reduced. Sapphire base substrate is advantageous to minimize the lattice defects by minimizing the stress between the base substrate and the nitride semiconductor when growing the nitride-based semiconductor thin film on the sapphire base substrate, it is possible to grow a higher quality nitride semiconductor.

The detailed structure and the growth method are similar to those in FIG. 4, but differ in that the nitride semiconductor is grown using a patterned sapphire base substrate. After growing in this way, the film quality of nitride-based semiconductor thin films grown with HVPE was excellent and the through-grid defect frequency was reduced. This growth reduces the lattice defects of the nitride thin film grown by HVPE, improves the film quality of the nitride semiconductor, which is the final device structure regrown by MOCVD, and improves the performance of the device, and the wet sapphire substrate described later by a wet etching method. It is intended to serve as a stop layer for wet etching when removed.

My Example 1

FIG. 7 illustrates an intermediate step of fabricating a semiconductor substrate by etching and removing the sapphire based substrate according to the first embodiment of the present invention. FIG. 7 illustrates a process of manufacturing a self-supporting semiconductor substrate by removing a sapphire base substrate using a nitride semiconductor structure as shown in FIG. 4 on a 450 um sapphire base substrate 11.

In FIG. 7, 5 μm of In _x (Ga _y Al ₁ ) by MOCVD on a 200 μm In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer 12 regrown with hydride vapor phase epitaxy (HVPE) on a sapphire base substrate. _-y ) N nitride semiconductor layer 13 Deposit 1 μm of SiO 2 (15) on the surface of the nitride semiconductor 13 to prevent damage to the nitride based semiconductor layers 12 and 13 that may occur in wet etching after regrowth. (deposition)

In this case, the nitride semiconductor structures 12 and 13 grown on the sapphire base substrate 11 may include metal organic chemical vapor deposition, liquid phase epitaxy, and molecular beam epitaxy. ), Single layer or multiple layers grown by hydride vapor phase epitaxy, metal organic vapor phase epitaxy (MOVPE), metal organic chemical vapor deposition, liquid epitaxial method (liquid phase) epitaxy, molecular beam epitaxy, or vapor phase epitaxy on the nitride semiconductor layer grown by MOCVD single or multiple layers of nitride based semiconductor layer 13 In the self-standing semiconductor substrate process, the thin film structure is not particularly affected.

Considering the nitride semiconductor process and the device process, which are performed later, it is advantageous to increase the thickness of the nitride semiconductor layers 12 and 13, but it cannot be thickened indefinitely due to the stress between the base substrate and the nitride semiconductor, and the entire semiconductor thin film 12, 13 ), The thickness is preferably 10 um to 500 um.

Then, to protect the semiconductor surface during wet or dry etching, a protective film 15 such as SOG (spin-on-glass) and SiO ₂ is deposited about 1 μm, and then the sapphire substrate 11 is wrapped and polished to 30 μm. Shaved to 50um thickness, and the wrapped surface is smoothed by mirror polishing so that the surface roughness is 20um or less. The lapping of the sapphire substrate 11 may include CMP (chemical mechanical polishing), ICP / RIE dry etching, mechanical polishing using alumina (Al 2 O 3) powder or hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), hydroxide Sodium (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), chromium oxide (CrO 3), water (H ₂ O), potassium hydroxide (KOH), potassium hydrogen sulfate (KHSO 4) and aloe etch (4H ₃ PO ₄ + 4CH ₃ COH + HNO ₃ + H ₂ O) proceeds by wet etching using a mixed solution of at least one or a combination thereof as an etchant. At this time, any one of BCL ₃ , Cl ₂ , HBr, Ar, or a mixed gas thereof is used as an etching gas of ICP / RIE or RIE. At this time, the thickness of the sapphire substrate 11 is preferably as thin as possible in order to minimize the etching process time, but if too thin, the substrate 11 is wheel-worn or difficult to handle is preferably about 10um ~ 300um. In addition, the roughness of the surface of the mirror polished sapphire substrate 11 should be 20 um or less. This is because the roughness of the surface of the sapphire substrate 11 is transferred to the nitride semiconductor as it is, which may damage the nitride semiconductor structure.

Thereafter, the wet etching of the sapphire substrate 11 is performed in the following manner. The etching rate of the sapphire substrate 11 by the etching solution mixed with sulfuric acid (H ₂ SO ₄ ) and phosphoric acid (H ₃ PO ₄ ) at a temperature of 320 ° C. was measured, and the time of about 5 μm was added to the sapphire substrate 11. Immerse in the etching solution for a time. The etching solution used here exhibits an etching rate of 1/10 or less relative to the sapphire substrate 11 with respect to the nitride semiconductor. That is, the etching selectivity of the nitride semiconductors 12 and 13 with respect to the sapphire base substrate 11 is 10 or more. Therefore, since the etching speed of the nitride semiconductors 12 and 13 is slow even if the etching process is performed even after the sapphire base substrate 11 is completely etched, the nitride semiconductor layers 12 and 13 are less likely to be damaged. On the other hand, it is preferable to maintain the temperature of the etching solution at 100 ℃ or more in order to shorten the etching time. The heating for maintaining the temperature of the etching solution above 100 ℃ may be a direct heating method to put the solution on the heater or directly contact the heater and the indirect heating method using light absorption.

ICP / RIE technology may be used for etching the sapphire base substrate 11. In order to quickly etch the sapphire substrate 11, it is desirable to increase the ICP and RIE power as much as possible, but care must be taken because it may damage the epi layer.

8 is a graph illustrating etching rates of sapphire and GaN by ICP / RIE dry etching. As shown in FIG. 8, the sapphire and nitride semiconductors have increased etch rates as the ICP and RIE powers are increased, but the etching ratio between the sapphire and nitride semiconductors (Al ₂ O ₃ etch rate / GaN etch rate) is increased. You can see that it is decreasing. These results indicate that when the sapphire substrate 11 is etched by the ICP / RIE technique, which is a dry etching technique, it is difficult to stop the etching in the nitride semiconductor layer 12 made of the nitride semiconductor, and the etching is performed in the nitride semiconductor layer 12. To stop, you must use techniques such as optical analysis or residual gas analysis. Even with these analytical techniques, the probability of success is low. However, in the wet etching method, the nitride semiconductor layer 12 may be used as an etch stop layer to obtain a process margin, which is a requirement for mass production.

9 is a graph showing an etching rate when wet etching sapphire and GaN with a mixed solution of sulfuric acid (H ₂ SO ₄ ) and phosphoric acid (H ₃ PO ₄ ).

As can be seen in Figure 9, the etching selectivity of the sapphire to the nitride-based semiconductor of the solution of sulfuric acid and phosphoric acid may be 20 or more at a specific temperature. These results indicate that the nitride semiconductor layer 12 can be effectively used as an etch stop layer of the sapphire substrate 11, and an etching selectivity of 20 or more was obtained even at a high temperature of 100 ° C. In particular, since the sapphire etching rate is more than 1um / min at 320 ℃ temperature considering the production cost, productivity, process stabilization it can be seen that the method presented in the present invention is more advantageous than any conventional method.

In the case where the present invention is applied to mass production, an important factor is to secure process conditions for increasing the etching selectivity between the sapphire substrate 11 and the nitride semiconductor layer 12, which is a nitride semiconductor, and in particular, the nitride semiconductor layer 12 ) Is effective as a sapphire etch stop layer. As the nitride semiconductor layer 12, an In _x (Ga _y Al _{1 -y} ) N (1≥x≥0, 1≥y≥0) series may be used. Preferably, the composition ratio of Al is increased or Mg is increased. It is effective to use doped p-type GaN. As shown in FIG. 4, before forming the nitride semiconductor layer 12 on the sapphire substrate 11, the etching stop layer may be separately formed by locally forming a protective film 14 such as SiO ₂ or SiNx. It may be. In particular, SiO ₂ has a sapphire and a high wet etching selectivity.

FIG. 10 is a cross-sectional view of etching a sapphire substrate for a pattern having various line widths with a solution of sulfuric acid (H ₂ SO ₄ ) and phosphoric acid (H ₃ PO ₄ ). As can be seen in Figure 10, the etched depth of the sapphire substrate depends on the pattern width opened, it can be seen that the wider the line width is wider. As can be seen in FIG. 11, the pattern having a line width of 57 um is etched to a depth of 24 um to have an aspect ratio of 0.4 while the pattern having a 10 um line width is only etched at a depth of 1.5 um, so the aspect ratio Is only 0.1. In other words, in wet etching, the substrate is oriented in wet etching, and the etching depth depends on the patterned line width. The base substrate of sapphire mainly used is C plane of (0001), and when wet etching, as shown in FIG. It forms a slope. This phenomenon is due to the difference in etching speed between C surface of (0001), M surface of (10-10), R surface of (-1012) and A-etched facet surface of (11-20). Because. In other words, the surface orientation dependence of sapphire etching speed was found to be C plane> R plane> M plane> A plane, and as a result, the etch depth is determined by the open line width. You can control the etching depth by yourself, and narrowing the open line width means that you can adjust the etching depth with a depth of less than 1um. Microscopic observation of the etched surface revealed that the surface morphology was very clean and no large thickness deviations could be observed.

12 is a photograph of the surface of the nitride semiconductor layer 12 after the sapphire substrate is removed by a wet etching method.

As can be seen in FIG. 12, even after the sapphire substrate 11 was removed, almost no crack or damage of the thin film due to stress was found, and the surface of the nitride semiconductor layer 12 was also very clean.

Finally, as shown in FIG. 7, when the protective film is immersed in fluoric acid (buffer oxide etchant) and etched, a self-standing semiconductor substrate is manufactured. A plan view of the fabricated self-supporting nitride semiconductor substrate is shown in the last part of FIG. When the whole device structure is grown on the sapphire substrate and the sapphire substrate is removed, there is no need to regrow the nitride-based semiconductor thin film later, but when the semiconductor substrate is used as the basic substrate for crystal growth, the self-standing semiconductor is later Single or multiple layers grown on metal substrates by metal organic chemical vapor deposition, liquid phase epitaxy, molecular beam epitaxy, vapor phase epitaxy Layer or any one or more of metal organic chemical vapor deposition, liquid phase epitaxy, molecular beam epitaxy, and vapor phase epitaxy. Re-grown single or multiple nitride-based semiconductor layers 13 by mixing, followed by vertical electrode light emitting diodes and vertical electrode laser diodes It can be prepared such as HBT (hetero bipolar transistor). Preferably, the film is grown by MOCVD in consideration of nitride-based semiconductor film quality and productivity. The reason why nitride semiconductors are regrown by MOCVD on semiconductor substrates is that high-quality semiconductor thin films can be grown without defects in crystal growth and device fabrication such as cleavage, dicing, etc. is easy. .

My 2 Example

In the second embodiment of the present invention, the semiconductor substrate was fabricated by removing the sapphire substrate using only a mechanical polishing technique using a nitride semiconductor grown on the sapphire base substrate used in the first embodiment of the present invention. That is, if the thickness of the nitride semiconductor layer 12 grown with HVPE to be used as a self-standing semiconductor substrate among the nitride based semiconductor layers 12 and 13 grown on the sapphire substrate becomes 100um or more and only the sapphire substrate can be wrapped in mechanical polishing, The sapphire substrate can be removed by polishing alone, and it is considered that there is some process margin considering that the thickness tolerance value of lapping is ± 3um in lapping technology. In the case of removing the sapphire substrate by lapping only, the process is somewhat complicated and difficult, but after wax bonding to the lapping holder and the surface of the nitride semiconductor layer 13 grown on the sapphire substrate 11, the sapphire substrate 11 is Al ₂ O ₃ powder. Mechanical polishing was performed to obtain a freestanding nitride semiconductor substrate.

My 3 Example

FIG. 13 illustrates an intermediate step of fabricating a semiconductor substrate by etching and removing the sapphire based substrate according to the third embodiment of the present invention. The manufacturing method is similar to the first embodiment of the present invention described above, except that the auxiliary substrate is attached before etching and removing the Sapphire base substrate. By attaching the auxiliary substrate, the thinner the sapphire substrate can be polished if the back side is thinner, and the etching time of the sapphire base substrate can be reduced, and the backside of the sapphire substrate can be solved by the problem that the substrate can be bent.

Hereinafter will be described in detail with reference to the drawings. As can be seen in Figure 13, 5um by MOCVD on 100um of In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer 12 regrown with hydride vapor phase epitaxy (HVPE) on sapphire base substrate 11 In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer 13 is grown again. As described above, the structure of the nitride semiconductor layer 12 grown on the sapphire base substrate 11 may include a metal organic chemical vapor deposition method, a liquid phase epitaxy method, and a molecular beam epitaxial method. (Molecular beam epitaxy), single layer or multiple layers grown by vapor phase epitaxy, metal organic chemical vapor deposition, liquid phase epitaxy, molecular beam epi It may include a single layer or multiple layers regrown by MOCVD on the nitride based semiconductor layer 12 grown by Molecular beam epitaxy and vapor phase epitaxy, and a thin film for fabricating a self-supporting semiconductor substrate. The structure is not particularly affected. Considering the nitride semiconductor process and the device process to be carried out afterwards, it is advantageous to increase the thickness of the nitride semiconductor, but due to the stress between the base substrate and the nitride semiconductor, it is preferable that the thickness is not limited to 10 μm to 500 μm.

Then, to protect the semiconductor surface during wet or dry etching, a protective film 15 such as SOG (spin-on-glass) or SiO ₂ is deposited about 1 μm, and then an insulating substrate such as sapphire substrate, Si, GaAs, GaP, InP, Any one of a semiconductor substrate such as InAs, a conductive oxide film substrate such as indium tin oxide (ITO), ZrB, or ZnO may be attached to the auxiliary substrate 18. The attachment of the auxiliary substrate 18 is preferably made of wax or eutectic metal as the adhesive. First, the nutraceutical metals 16 and 17 are deposited on a protective film such as SiO or spin-on-glass (SOG) deposited on the nitride semiconductor layers 12 and 13, and the nutraceutical metal is directly deposited on the auxiliary substrate 18. . The eutectic metal is thermocompressed by a metal of any one of Ti, Au, Sn, In, Pd, Pt, Rh, Ni crowd or a combination thereof. In particular, since Au and Pt are not nutrients to acids, it is preferable to use an alloy composed of Au and Pt. At this time, the thermal compression is carried out for 3 to 60 minutes at a pressure of 1MP to 3MP (mega pascal) at a temperature of about 300 ℃ to 500 ℃.

Thereafter, the sapphire substrate is wrapped to 30 μm to 50 μm to thin the sapphire substrate. Lapping of the sapphire substrate 11 is performed by chemical mechanical polishing (CMP), ICP / RIE dry etching, mechanical polishing using alumina (Al2O3) powder or hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), chromium oxide (CrO 3), water (H ₂ O) and aloe etch (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O The mixed solution by at least one of the above or a combination thereof is subjected to wet etching as an etching solution.

At this time, any one of BCL ₃ , Cl ₂ , HBr, Ar, or a mixed gas thereof is used as an etching gas of ICP / RIE or RIE. The thickness of the sapphire substrate 11 is preferably as thin as possible in order to minimize the etching process time, preferably about 10um to 50um. In addition, the roughness of the surface of the mirror polished sapphire substrate 11 should be 20 um or less. This is because the roughness of the surface of the sapphire substrate 11 is transferred to the nitride semiconductor layer 12 as it is, which may damage the nitride semiconductor structure. When the sapphire substrate 11 is removed by wet etching, when the substrate is immersed in a buffer oxide etchant (BOE), the oxide film 15 used as a protective layer is etched to separate the substrate attached to the auxiliary substrate from the nitride semiconductor substrate layer 13 to free-standing semiconductor. The substrate is made.

At this time, part of the sapphire substrate may be removed by dry etching such as ICP / RIE, and wet etching and dry etching may be mixed. The reason is that dry etching cannot stop the etching in the nitride semiconductor thin film, but only wet etching can be stopped. The wet etching of the sapphire substrate 11 other than the above matters may be performed as in the first embodiment described above.

My 4 Examples

FIG. 14 illustrates an intermediate step of manufacturing a semiconductor substrate by etching and removing only a part of the sapphire base substrate 11 according to the fourth embodiment of the present invention. The manufacturing method is similar to the first embodiment of the present invention described above, but only a part of the sapphire base substrate 11 is etched by depositing 1 μm of oxide SiO 2 19 on the sapphire substrate 11, photo etching the oxide film, and patterning the oxide film. do. This is to etch only a part of the sapphire substrate to secure the semiconductor contact surface and to remove the sapphire substrate to break the semiconductor thin film or to facilitate handling. In some cases, it can also be used as a scribing line for device isolation. The pattern shape and size of the oxide film can be variously modified according to the use and are not particularly limited, and can be performed in the opposite shape as shown in FIG.

Hereinafter will be described in detail with reference to the drawings. As can be seen in Figure 14, 5um by MOCVD on 100um of In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer 12 regrown with hydride vapor phase epitaxy (HVPE) on sapphire base substrate 11 In _x (Ga _y Al _{1 -y} ) N nitride semiconductor layer 13 is grown again. As described above, the structure of the nitride semiconductor layer 12 grown on the sapphire base substrate 11 may include a metal organic chemical vapor deposition method, a liquid phase epitaxy method, and a molecular beam epitaxial method. (Molecular beam epitaxy), the nitride-based semiconductor layer 12 may include a single layer or a plurality of nitride-based semiconductor layer 13 re-grown by MOCVD, and has a special influence on the thin film structure to fabricate a self-standing semiconductor substrate Do not receive. Considering the nitride semiconductor process and the device process to be carried out afterwards, it is advantageous to increase the thickness of the nitride semiconductor, but due to the stress between the base substrate and the nitride semiconductor can not be infinitely thick, it is preferable to set to 10um to 500um.

Thereafter, the sapphire substrate is wrapped to 30 μm to 50 μm to thin the sapphire substrate. Lapping of the sapphire substrate 11 is performed by chemical mechanical polishing (CMP), ICP / RIE dry etching, mechanical polishing using alumina (Al ₂ O ₃ ) powder or hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH) , Sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), chromium oxide (CrO ₃ ), water (H ₂ O) and aloe etch (4H ₃ PO ₄ + 4CH ₃ COOH + The mixed solution by at least one of HNO ₃ + H ₂ O) or a combination thereof is advanced by high temperature wet etching as an etching solution. At this time, any one of BCL ₃ , Cl ₂ , HBr, Ar, or a mixed gas thereof is used as an etching gas of ICP / RIE or RIE. The thickness of the sapphire substrate 11 is preferably as thin as possible in order to minimize the etching process time, preferably about 10um to 50um. In addition, the roughness of the surface of the mirror polished sapphire substrate 11 should be 20 um or less. This is because the roughness of the surface of the sapphire substrate 11 is transferred to the nitride semiconductor layer 12 as it is, which may damage the nitride semiconductor structure.

Thereafter, after depositing 1 μm of oxide SiO 2 on the wet sapphire substrate, the oxide layer is patterned using a photolithography etching technique to etch SiO ₂ using a BOE or RIE method to etch the sapphire substrate 11 using SiO ₂ as an etching mask. When the sapphire substrate 11 is removed by wet etching, the substrate is immersed in a buffer oxide etchant (BOE) to etch the oxide film 15 used as a protective film to manufacture a semiconductor substrate.

In addition, the wet etching of the sapphire substrate 11 may be performed as in the first embodiment described above.

The present invention facilitates the removal of the sapphire substrate on which the nitride semiconductor is grown, making it easier to manufacture vertical electrode devices at lower cost, improving the reliability and brightness of the device, and reducing the size of the device, thereby improving productivity and device performance. It will be a key technology in the LED lighting field that enables the production of luminance / high-performance nitride semiconductor light emitting devices, and it will be possible to manufacture electronic devices such as HBT (hetero bipolar transistor), which has been considered impossible. It is anticipated that the development of technology will continue in this area.

Although the present invention has been described with reference to the embodiments shown in the accompanying drawings, this is merely exemplary, and those skilled in the art may understand that various modifications and equivalent other embodiments are possible. There will be. Therefore, the true scope of protection of the present invention should be defined only by the appended claims.

As described above, in the present invention, the sapphire substrate can be thinned by backside polishing to shorten the device process time, and the productivity is greatly improved since the sapphire substrate is removed by using dry or wet etching using nitride semiconductor as an etch stop layer. In the case of the laser lift-off method, it is possible to prevent thermal damage that the epi layer can receive. In addition, by using the etching selectivity between the sapphire substrate and the nitride semiconductor, it is possible to easily improve the reproducibility of the process, and the standardized process is possible to facilitate mass production. By fabricating the nitride semiconductor substrate, it is possible to manufacture a vertical electrode type light emitting device in a conventional planar device, thereby reducing the chip area, thereby improving chip yield per wafer, and efficiently dissipating heat and electrostatic discharge. Since the vertical electrode type light emitting device has a current flowing uniformly through the entire area of the chip, it can be driven even at a large current, thereby obtaining a high light output from a single device.

In addition, electronic devices such as vertical electrode type laser diodes and bipolar transistors (HBTs), which have been considered difficult, have been expected to be explosively utilized because they can be manufactured more easily and at lower cost.

Claims (26)

a. Providing a base substrate formed from any one of sapphire (Al ₂ O ₃ ), GaP, GaAs, Si, SiC, and AlN; b. Forming a semiconductor layer on the base substrate; c. Forming a protective film to surround the semiconductor layer; d. Lapping and polishing the base substrate to remove the base substrate from the semiconductor layer; And e. And etching the protective film to remove the protective film. The method of claim 1, wherein the d step includes lapping and polishing the base substrate and then etching the substrate to remove the base substrate from the semiconductor layer. The method of claim 1, wherein the etching in step d is hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), Chromium oxide (CrO ₃ ) and aluene (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O) by a wet etching method using a mixed solution as an etching solution or a combination thereof Method for producing a semiconductor substrate, characterized in that. 4. The method of claim 3, wherein using an In _x (Ga _y Al _1-y ) N (1≥x≥0, 1≥y≥0, x + y> 0) semiconductor layer as the etch stop layer in the wet etching. A method for manufacturing a semiconductor substrate. The method of claim 3, wherein the etching stop layer in the wet etching comprises at least one of a silicon oxide cluster and a silicon nitride cluster (SiO ₂ or SiN _x cluster) layer. delete delete The method of claim 3, wherein the etching in step d further comprises dry etching using an ICP / RIE or RIE method. The method of claim 8, wherein the dry etching comprises using at least one of BCL ₃ , Cl ₂ , HBr, and Ar as an etching gas. delete The method of claim 2, wherein the thickness of the base substrate after lapping and polishing in step d is 10 μm or more and 300 μm or less. The lapping and polishing of step d is performed by mechanical polishing, chemical mechanical polishing (CMP) and hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H). ₂ SO ₄ ), mixing by phosphoric acid (H ₃ PO ₄ ), chromium oxide (CrO ₃ ) and allues (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O) or a combination thereof A method for manufacturing a semiconductor substrate, comprising using any one or more of wet etching methods using a solution as an etchant. The method of claim 1, wherein the protective film is SiO ₂ Or SOG (spin-on-glass) manufacturing method of a semiconductor substrate. a. Preparing a base substrate formed from sapphire (Al ₂ O ₃ ); b. Forming an etch stop layer on the base substrate; c. Forming a semiconductor layer on the etch stop layer; d. Forming a protective film to surround the semiconductor layer; e. Etching and removing the base substrate; And f. Removing the protective film; The method of claim 14, wherein after step d, d1. Attaching an auxiliary substrate on the passivation layer, wherein the auxiliary substrate is separated from the semiconductor layer by removing the passivation layer in step f. The method of claim 14, wherein the etching in step e is hydrochloric acid (HCl), nitric acid (HNO ₃ ), potassium hydroxide (KOH), sodium hydroxide (NaOH), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), Chromium oxide (CrO3) and aluene (4H ₃ PO ₄ + 4CH ₃ COOH + HNO ₃ + H ₂ O) or a combination of these solutions by a wet etching method using a mixed solution as an etchant A method of manufacturing a semiconductor substrate, characterized in that. The semiconductor device of claim 14, wherein the etch stop layer comprises an In _x (Ga _y Al _1-y ) N (1≥x≥0, 1≥y≥0, x + y> 0) semiconductor layer, a silicon oxide cluster, or silicon nitride. A method for manufacturing a semiconductor substrate, comprising at least one of a cluster (SiO ₂ or SiN _x cluster). delete delete The method of claim 16, wherein the etching in step e further comprises a dry etching method using at least one of BCL ₃ , Cl ₂ , HBr, and Ar as an etching gas. delete 15. The method of claim 14, wherein the thickness of the base substrate after lapping and polishing in step e is 10 um or more and 300 um or less. The method of claim 14, wherein the protective layer is etched using HF or BOE (buffer oxide etchant). 15. The method of claim 14, wherein the protective film is SiO ₂ Or SOG (spin-on-glass) manufacturing method of a semiconductor substrate. The semiconductor substrate manufactured by the manufacturing method of any one of Claims 1-5, 8, 9, and 11-13. The semiconductor substrate manufactured by the manufacturing method of any one of Claims 14-17, 20, and 22-24.

Images