JPS6360632B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a digital phase control device for a power converter using a controlled rectifier. FIG. 1 is an example of a power conversion device using a controlled rectifier. The three-phase thyristor bridge 1 controls the firing phase of the thyristors U, V, W, X, Y, and Z connected between the three-phase AC terminals R, S, T and the DC side terminals P, N. Accordingly, forward conversion operation or reverse conversion operation can be performed. Such power converters are used for motor control, frequency conversion, DC power transmission power conversion, and the like. Conventionally, analog AC/DC superimposition methods have been used to control the firing angle of the three-phase thyristor bridge as described above, but in recent years, the development of digital devices has been remarkable, and advances in microcomputers and memory devices have enabled the above-mentioned Digitalization is also being encouraged in the phase control devices of power converters. Digital phase control devices commonly seen today have a configuration shown in the schematic diagram of FIG. 21 receives AC voltage signals e R , e S , e T that are in phase with the AC voltages _R , _S , and _T shown in FIG.
Digital phase synchronization signal θ whose phase is synchronized with S and T
1 and a phase determination signal θ2. 22 is a digital arithmetic unit that receives the feedback signal FED and set value REF from the power converter 1 and generates a digital phase control signal E _C ;
It usually consists of a computer. The digital phase control signal E _C is composed of a control signal δ ₁ and an angle signal δ ₂ . 23 is a digital comparator that compares the phase synchronization signal θ1 and the control signal _δ1 and outputs a pulse COM when the phase synchronization signal θ1 becomes equal to or greater than the control signal _δ1 . 24 is a gate logic circuit, which outputs the phase determination signal θ2, which is part of the digital synchronization signal, and the pulse
This is a device that inputs COM and angle signal δ ₂ and outputs firing pulses TP to each phase of the power converter 1 shown in FIG. Next, the operation to be performed by the gate logic 24 will be explained using an actual example. Figure 3 shows the digital phase detector 21 shown in Figure 2.
FIG. This circuit constitutes a known PLL (phase lock loop), and the output pulse from the voltage controlled oscillator (VCO) 12 is frequency-divided by 256 by a counter 13 and further divided by 6 by a hexadecimal counter. The count value of this hexadecimal counter 14 is determined by the decoder 15.
The signals are inputted into the circuit and become three-phase outputs e _1R , e _1S , and e _1T , which are phase-compared with the AC voltage signals e _R , e _S , and e _T by phase comparators 7, 8, and 9, and added by an adder 10. The existing DC component is taken out by the loop filter 11 and drives the voltage controlled oscillator 12. With this configuration, the outputs from the counter 13, the hexadecimal counter 14, and the decoder 15 become signals synchronized with the three-phase voltages e _R , e _S , and e _T from the power supply. θ1 is an 8-bit binary phase synchronization signal from the counter 13, and θ2 is a phase determination signal from the hexadecimal counter 14. The phase synchronization signal θ1 repeats counting from 0 to 255 in synchronization with the electrical angle of 60° of the power supply voltage. The SYNC signal is a signal added to the hexadecimal counter 14 as a carry signal from the counter 13. The digital arithmetic unit 22 is composed of a computer 40 and a sampling pulse generator 45, and FIG. 4 shows an example of the digital arithmetic unit 22. It consists of a computer 40 consisting of a central processing unit (CPU) 41, a memory (MFM) 42, an input device (I-PORT) 43 and an output device (O-PORT) 44, and a sampling pulse generator (SPG).
It consists of 45. For each sampling pulse (SMP), the central processing unit 41 takes in the setting value REF and the feedback signal FED from the power conversion device 1, and stores it in the memory 4.
Calculations are performed based on the program and data in 2, and the results are outputted from the output device 44 as a digital phase control signal _E. If the digital phase control signal E _C output from the digital arithmetic unit 22 has 10 bits, the upper 2 bits are the angle signal δ ₂ and the lower 8 bits are the control signal δ ₁ . After the control signal δ ₁ and the phase synchronization signal θ1 from the digital phase detector 21 are compared by the digital comparator 23, when the control signal δ ₁ becomes equal to or greater than the phase synchronization signal θ1, the signal COM It is output from the digital comparator 23 as . The phase determination signal θ2 of the hexadecimal counter 14 and the angle signal θ2 of the upper 2 bits of the phase control signal E _C in FIG.
is the binary code of the values shown in Table 1.

[Table] One count of the phase determination signal θ2 corresponds to 60° of the electrical angle of the power supply voltage e _RS (that is, e _R −e _S ). Each thyristor element U to Z of the power conversion device in Fig. 1
can be controlled for a period of 180° in electrical angle of the power supply voltage,
The phase determination signal θ2 indicates where the digital phase control signal E _C is located by equally dividing the above 180° into 60° increments. For the values in Table 1, the ignition phase of the power converter 1 in FIG. 1 is determined by the gate logic circuit 24 as shown in Table 2.
Judge by.

[Table] Furthermore, the gate logic circuit 24 determines that the current phase should be fired, and outputs a firing pulse. FIG. 5 is a diagram illustrating the firing phase determination of the gate logic circuit 24. The phase synchronization signal θ1 is one third of the period of the power supply voltage.
The hexadecimal count is repeated every 60 degrees in electrical angle in synchronization with the line voltage e _RS (that is, e _R −e _S ) of the power supply voltage from 0 to 255. The above phase judgment signal θ2 is generated by the 8-bit binary counter 1.
Since the carry signal of 3 is counted, the triangular wave in FIG. 5 is considered to be numbered by the phase determination signal θ2, and the value of the phase determination signal _δ2 is shown as the code of the triangular wave. When the angle signal δ ₂ becomes as shown on the left side of FIG. 5, the phase control signal E _C can be considered to change as shown by the solid line. Here, it can be seen that the firing pulse for each thyristor of the power conversion device 1 shown in FIG. 1 can be obtained as follows. For example, the ignition signal of thyristor U is generated during any period of triangular wave 0, 1, or 2, that is, during the period of 180° in electrical angle of the power supply voltage e _RS (i.e., e _R −e _S ),
It is sufficient to output it according to the phase control signal _EC . This is achieved by comparing the control signal δ _1, which is the lower 8 bits of the phase control signal E _C , with the phase synchronization signal θ 1 of the 8-bit binary counter 13 and outputting the signal COM from the 3-bit _comparator. The ignition phase is determined based on the state of the phase determination signal θ2. This situation is represented in FIG. 5 by showing the control signal δ ₁ as a dotted line, and the control reference δ ₁ shown as a dotted line and the phase synchronization signal θ shown as a solid triangular wave.
Based on the signal COM output at the intersection of 1, it is determined to which thyristor of the power converter 1 shown in FIG. 1 the output is to be made. The gate logic circuit 24 compares this determination with the phase to be output this time, and if it determines that it is time to output the firing pulse TP, it outputs the firing pulse.
Output TP. Conventionally, the digital phase control device described above has often been used alone, but in recent years there has been a trend to use it in redundant form from the standpoint of increasing reliability. In this case, multiplexing or n out of m (n in nm,
m is an integer), but if the sampling pulse generator 45 is provided for each digital phase control device 22, the output timing of the sampling signal SMP differs depending on each digital phase control device, so the setting value When REF is changed, there will be a lag in the time at which the set value REF is taken into each digital arithmetic unit 22, and the feedback signal FED to be taken in will also differ due to the time lag, so it may change for each digital phase control device. . From the perspective of the power converter 1, the above phenomenon results in the ignition pulses being given from each digital phase control device to each thyristor of the power converter 1 with a large time lag. A problem arises in that the ignition pulses cannot be integrated into one ignition pulse. In order to prevent the above-mentioned problem, it is sufficient to operate the sampling pulse generators 45 in synchronization or to provide one sampling pulse generator 45 to each digital phase control device. If there is only a signal from the digital phase control device, if this signal fails, each digital phase control device will no longer perform its function, eliminating the advantage of redundancy. Furthermore, even if some device is added to achieve synchronization, a failure of this device may lead to a failure of the entire redundant system. Here, the present invention solves the above-mentioned problems,
It is an object of the present invention to provide a digital phase control device that is easy to maintain and has high reliability that can be easily made redundant. Hereinafter, the present invention will be explained with reference to an illustrated embodiment. The present invention provides redundancy of the digital phase control device.
The sampling pulse SMP is obtained from the digital phase detector of each digital phase control device, and the digital phase control signal from the digital arithmetic device is compared to obtain the optimum digital phase control signal _E. . FIG. 6 shows a digital phase control signal generator 60 used for redundancy, which generates a digital phase synchronization signal θ and a digital phase control signal E _C. In the drawings, the same reference numerals indicate the same or corresponding parts. The difference from Fig. 4 is the sampling pulse generator 4.
5 instead of the signal from digital phase detector 21
The signal from the SMP is used as the sampling pulse SMP. FIG. 7 shows 2 out of 3 as an example of redundancy, in which the E _C signal from the digital phase control signal generator 60 in FIG. 6 is taken into the selection circuit 71,
This figure shows how the signal is selected here and used as one _EC signal in each digital phase control device. Note that selection circuits are necessary for each of the digital phase control signal generators 601, 602, and 603, but are omitted from illustration. The digital phase detector 21 has the configuration shown in FIG.
One of these digital signals is used as a sampling pulse. Since this sampling pulse is synchronized with the power supply voltage, it becomes a synchronized signal in the digital phase control signal generators 601, 602, and 603 in FIG.
Therefore, the signals E _C1 , E _C2 , and E _C3 become substantially equal signals, making it easy for the selection circuit 71 to select 2 out of 3. Digital phase control signal generator 601, 602,
When 603 is operating without failure, the signals E _C1 ,
E _C2 and E _C3 are equal except for the lower several bits among the 10 bits, and the lower several bits are used as the lower several bits of the signal E _C1 , and the upper bits are the same. This is the digital phase control signal generator 602
The same applies to the selection circuit for the digital phase control signal generator 603 and the selection circuit for the digital phase control signal generator 603. Digital phase control signal generator 601, 602,
If one of 603 fails and outputs a signal E _C that is significantly different from the other two, the selection circuit will not be significantly different. That is, the signal E _C0 is determined by two signals E _C that differ only in the lower few bits. FIG. 8 shows a series of digital phase control devices according to the present invention, which uses the digital phase control signal generator 60 of FIG. 6 in combination with the 2 out of 3 redundant system of FIG. 7. Reference numeral 80 denotes a gate signal generation circuit which collectively shows the digital comparator 23 and gate logic circuit 24 of FIG. A circuit similar to that shown in FIG. 8 is connected to the digital phase control signal generator 6 shown in FIG.
By providing the gate pulses 02 and 603 respectively, even if the respective gate pulses TP are output, there will not be a significant time lag between the gate pulses, so it becomes easy to integrate these gate pulses TP. Although the selection circuit 71 is provided in FIGS. 7 and 8, the digital phase control signal generator 6 in FIG.
If 0 is used, the selection circuit 71 can be omitted, each Ec signal can be input to the computer in the digital phase control signal generator 60, and the optimal configuration can be made to obtain the E _C0 signal. Furthermore, although a 2 out of 3 selection system has been shown as redundancy, examples of redundancy include duplexing, 5 out of 6, etc., and this is not the only option. As explained above, according to the present invention, the following effects are recognized. By obtaining the sampling pulse of the digital arithmetic unit 22 of the digital phase control device of the power converter from the digital phase shifter 21,
This has the advantage of facilitating redundancy of the digital phase control device. By configuring the digital phase control signal E _C from the digital arithmetic unit 22 to be compared and selected for use, there is an advantage that the ignition pulses TP given to the power conversion device 1 can be easily integrated. As mentioned above, redundancy has been made easier, so
There is an advantage that a highly reliable digital phase control device for the power conversion device 1 can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram of a power conversion device that performs phase control, Fig. 2 is a block diagram of a conventional digital phase control device, Fig. 3 is a detailed diagram of a digital phase detector, and Fig. 4 is a diagram of a conventional digital phase control device. A schematic diagram of the arithmetic unit,
Figure 5 is an explanatory diagram of the operation of the gate logic circuit, Figure 6
The figure is a schematic diagram of a digital phase control signal generator.
The figure shows an example of a redundant configuration, and FIG. 8 is a block diagram showing the configuration of an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Power converter (three-phase thyristor stabilizer), 7, 8, 9... Phase comparator, 10... Adder, 11... Loop filter, 12... Voltage controlled oscillator, 13... Counter, 14 ... Hexadecimal counter, 15 ... Decoder, 21 ... Digital phase detector, 22 ... Digital arithmetic unit, 23 ... Digital comparator, 24 ... Gate logic circuit, 40
...computer, 41 ... central processing unit (CPU), 42 ... memory, 43 ... input device,
44... Output device, 45... Sampling pulse generator, 60... Digital phase control signal generator,
71... Selection circuit, 80... Gate signal generation circuit, 601, 602, 603... Digital phase control signal generator.

Claims (1)

[Scope of Claims] 1. A digital phase detector that outputs a digital phase synchronization signal synchronized with the input AC power supply voltage of a power conversion device configured with a controlled rectifier; a plurality of sets of digital phase control signal generators that calculate and derive control signals; a selection circuit that selects one of the digital phase control signals from the plurality of digital phase control signals; and the digital phase control signal and the digital phase synchronization signal. a gate logic circuit that outputs a firing pulse to a control rectifier of the power conversion device based on the signal from the digital comparator, the digital phase synchronization signal, and the digital phase control signal; A digital phase control device characterized by being provided.