JPS6360563A - Optoelectronic integrated element - Google Patents

Abstract

PURPOSE:To enable the simplification of a manufacturing process and ultra-high speed-high reliability-low cost without deteriorating the performance of an element by burying a section in the vicinity of an active layer with a base layer in an NPN type hetero-junction bipolar transistor. CONSTITUTION:When a semiconductor laser 2 and a hetero-junction bipolar transistor 3 are integrated onto the same semi-insulating InP substrate 10, sections in the vicinity of both ends of an active layer 13 in the semiconductor laser 2 are buried with P-type base layers 16 having high resistivity. Accordingly, leakage currents flowing through sections except the active layer 13 are reduced, the laser can be operated by low threshold currents, and only two-time crystal growth processes may be used, thus simplifying a manufacturing process, then improving the nondefective rate of products.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an opto-electronic integrated device that is a main component of ultra-high-speed, large-capacity optical communication devices, optical information processing devices, and the like.

(Conventional technology) An optical communication system uses optical fiber as the transmission path.

High-speed, large-capacity signal transmission is possible, and systems with transmission speeds of several hundred megabits have been put into practical use by assembling individual parts such as semiconductor lasers, transistors, and resistors. Furthermore, in order to realize ultra-high-speed, highly reliable, and low-cost optical communication systems, attempts are being made to integrate optical elements such as semiconductor lasers and electronic elements such as transistors on the same substrate. As an example of integrating a semiconductor laser and a transistor, for example, Applied Physics, T,-Letters (Appl, Phys, Le
45, No. 3, pp. 191-193, 198
A paper published in 2014 provides detailed information. According to this, a normal buried heterostructure semiconductor laser and a heterojunction bipolar transistor (HBT) are mounted on an n-InP substrate.
), it achieves high-speed operation at 1.6 GHz.

(Problems to be Solved by the Invention) In the conventional example, since an n-substrate was used, static capacitance could not be ignored through the n-substrate between the semiconductor laser and the heterojunction bipolar transistor. Because it is applied to the upper part, the capacitance between the electrical wiring cannot be ignored, and high-speed operation of 5.2 GHz or higher cannot be realized.

In order to eliminate these causes, it is possible to reduce the capacitance between the semiconductor laser and the heterojunction bipolar transistor by integrating the semiconductor laser and the heterojunction bipolar transistor on a semi-insulating substrate. Due to the difference in the layer structure of bipolar transistors, in order to operate a laser with a low threshold current, semiconductor It was necessary to optimize the laser and the heterojunction bipolar transistor separately. However, this method required three crystal growth processes, complicating the manufacturing process and resulting in a low product yield.

An object of the present invention is to solve these problems and provide an optoelectronic integrated device that operates at ultra high speed, has high reliability, and can be manufactured at low cost.

(Means for Solving the Problems) Means provided by the present invention in order to solve the above-mentioned problems and achieve the above objects is to combine a semiconductor laser element and an np on one substrate.
The present invention is an opto-electronic integrated device in which an n-heterojunction bipolar transistor is integrated, and is characterized in that the active layer of the semiconductor laser element is embedded in the base layer of the npn-heterojunction bipolar transistor.

(Function) In the present invention described above, the vicinity of the active layer of the semiconductor laser is
By embedding the base layer of an n-type heterojunction bipolar transistor, it becomes possible to form an optoelectronic integrated device consisting of a semiconductor laser and a heterojunction bipolar transistor in two crystal growth processes without degrading the device performance, resulting in ultra-high speed and high performance. A reliable and low-cost optoelectronic integrated device can be obtained.

(Example) Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a sectional view showing an optoelectronic integrated device according to an embodiment of the present invention. Semiconductor laser 2 is manufactured by patent application No. 56-1666.
This is a structure in which the buried semiconductor layer in the Brehner-type buried heterostructure described in No. 66 is replaced with a layered structure of a heterojunction bipolar transistor.

First, n-In(
1,61Ga□, 19Aso, nPo, ss First contact layer 11 (thickness 0.5 μm, carrier concentration 5X1
018 cm-3), n-I n P cladding layer 12 (
Thickness 1.03m1 Carrier density sx 1o”cm-3)
, Nondawg's I n O, 71G a O, 29A
S Q, 151 P 0.39 Active layer 13 (thickness 0.
1 μm), p-InP cladding layer 14 (thickness 'l, Qμ
m.

The carrier concentration is 1x 1018 cm-3). Next, mesa stripes 21 are formed into an inverted mesa structure on this wafer using normal photophosphorographic technology.
K 0. The width of the active layer 13 is 1.5 to 2.0 μm.
n-InP cladding layer 12 with 4% Br-methanol solution
Etch to the middle. Next, this wafer was coated with l), n-Ino, s*G a 6,1 by liquid phase growth technology.
1 A s O, 25 P o, 75 Collector layer 15
(Thickness Q,] Jtm.

Carrier concentration 5 X I 916 cm-''), p-I
n O,89G a 0011 A s 645 P
O,75 base layer 16 (thickness Q, 24 m1 carrier concentration 5 x 1018 crn-3), n - I n P
Emitter layer 17 (thickness 0.2 μm 1 carrier concentration 5X
10'cm-3), n+-InPnPo contact layer 1
8 (thickness 0.25m1 carrier density 1 x 1019
cm -3), p-I n 6. aIG ao,t
s A S 0.4I P 0.59 Cap layer 19 (
Thickness IAm, carrier concentration 1 x 1019 cm-3
) are formed sequentially. In this case, on the mesa stripe 21, since the width is as narrow as about 2 μm, the collector layer 15, the base layer 16, the emitter layer 17, and the second contact layer 18 are formed on the mesa stripe 21.
does not grow. The second liquid phase growth serves both the buried crystal growth of the semiconductor laser 2 and the crystal growth of the hetero G-type bipolar transistor 3, and at this time, the vicinity of both ends of the active layer 13 is p-type base layer 16
By embedding the semiconductor laser with the active layer 13, it is possible to reduce the leakage current flowing to a region other than the active layer 13 of the semiconductor laser, and the laser operation can be performed with a low threshold current.

After crystal growth, the mesa stripe 2, which becomes the semiconductor laser 2, is formed using normal photophosphorographic technology and etching.
The cap layer 19 is removed, leaving a width of 30 μm including 1. Next, the emitter electrode 26 (area 10 x 40 μm2) of the heterojunction bipolar transistor 3, and the base electrode 25
(area 10 x 40 μm”), collector electrode 24 (area 1
0×40 μm 2 ), the n-side electrode 22 of the semiconductor laser (
n-InP second contact layer 18, n-InP x emitter layer 17,
p-InGaAsP base layer 16,
n-InGaAsP: x-rector layer 15, n-I n
The P cladding layer 12, the n''-InGaAsP first contact layer 11, and the semi-insulating InP substrate 10 are sequentially etched. In this case, the cap layer 19, the base layer 16, the collector layer 15, and the first The contact layer 11 is H2S 04 + H20x + Hz
The second contact layer 18 having an InP composition, the emitter layer 17, the cladding layer 12 and the substrate 1 are removed with a mixed solution of O.
0 is removed by a mixture of HCn+H3PO4. Next, after depositing all 20 psi02 films 20 by CVD method, each electrode 22 is deposited by photolithographic technology.
, 23.24.25.26 of 5i02 is removed using buffered dock acid.

Next, each electrode 22, 23, 24, 25, 26 is formed using TiAu sputtering or a bonding and list-off method. After the heat treatment, electrical wiring 27 is formed using Au vapor deposition and photolithographic techniques. Finally, the semi-insulating InP substrate 10 is polished to about 100 μm to complete the wafer fabrication. Elements can be manufactured by separating each element from this wafer using the usual stretching method.

In this way, when the semiconductor laser 2 and the heterojunction bipolar transistor 3 are integrated on the same semi-insulating InP substrate 10, the parasitic capacitance can be reduced, which is advantageous in increasing the speed. By burying the vicinity of both ends of the layer 130 with the p-type base layer 16 having high resistivity, the leakage current flowing to areas other than the active layer 13 is reduced, and laser operation is possible with a low threshold current of 20 mA. Since only a crystal growth step is required, the manufacturing process can be simplified and the yield rate of products can be improved. Therefore, the optoelectronic integrated device of this example operates at ultra high speed,
It is highly reliable and can be manufactured at low cost.

Although size examples are shown in the above embodiments, since the manner of crystal growth varies greatly depending on the growth method, conditions, etc., it goes without saying that appropriate dimensions should be adopted.

Furthermore, although TiAu was used as the electrode metal in the above embodiments, there is no restriction on the type of electrode metal as long as good ohmic contact can be obtained. Further, the non-doped InGaAsP active layer 13 may have a multi-quantum well structure in which InGaAsP layers and InP layers are multilayered with a thickness of about 100λ.

Further, a DFB structure having a diffraction grating near the InGaAsP active layer 13 may be used. Furthermore, in the above embodiments, I n P/ I n Ga A s P
Although we used a semiconductor material of the Ga A I A s
/GaAs-based and other semiconductor materials may also be used.

(Effects of the Invention) As detailed above, according to the present invention, in a buried semiconductor laser for an optoelectronic integrated device in which a multilayer mesa stripe structure including an active layer is buried with a buried semiconductor layer, the vicinity of the active layer is buried. By embedding the base layer of an npn-type heterojunction bipolar transistor, it is possible to simplify the manufacturing process without degrading device performance, and to achieve ultra-high speed and
Highly reliable and low-cost optoelectronic integrated devices can be realized.

[Brief explanation of the drawing]

FIG. 1 is a sectional view showing one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Optoelectronic integrated device, 2...Semiconductor laser, 3...Heterojunction bipolar transistor, 10...Semi-insulating InP substrate, 11...
・・・・n I n 041G ao, 19A s
o, 41P O, 59 first contact layer, 12...
...N-InP cladding layer, 13...Non-doped In 6,710 a O, 2g A s 0
, 61 P O, 3g active layer 114° ----- P
-InP cladding layer, 15 = -n -1n O, 89
G ao, ttA SO, 2S P 0.75 collector layer, 16° --- P -I n O, HG a O
, 11A s 0725 P 0.75 base layer, 17
-・-n-InP emitter layer, 18......n
-InP$2 contact layer 119°°0°°p -I
n 041 Ga O,1g As (1,41P
O, 59 Cap layer, 2o... Song S i O2 film, 21
. . . Mesas) F, 7', 22 . . . N-side electrode of semiconductor laser, 23 . . . P-side electrode of semiconductor laser, 24 . . Curved collector electrode, 25.・・・・・・
・Base electrode, 26...Curved emitter electrode, 27...
··Electric wiring. Agent Patent Attorney Nobu Honjo Attendance 1〒

Claims (1)

[Claims] An optoelectronic integrated device in which a semiconductor laser element and an npn heterojunction bipolar transistor are integrated on one substrate, characterized in that the active layer of the semiconductor laser element is embedded in the base layer of the npn heterojunction bipolar transistor. Optoelectronic integrated device.