JPS6261383A - Semiconductor laser and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce the threshold value and to respond at a high speed by forming a semiconductor layer such as a high resistance layer or a P-N superlattice layer on a flat portion out of a groove in a double channel type light emitting element to block a leakage current flowing to portions except the light emitting region. CONSTITUTION:An N-type InP substrate 1 of a substrate and clad layer, an InGaAsP layer 2 of active layer, and a P-type InP layer 3 of clad layer are formed as the first semiconductor multiple layer to form a light emitting region, and grooves 4, 5 are formed on both sides. A P-type InP layer 6, an N-type InP layer 7, a P-type InP layer 8 of buried layers, and a P<+> type InGaAsP layer 9 of contacting layer are formed over the grooves 4, 5. An AlInAs layer 12 is formed as a current limiting semiconductor layer on the flat portion outside the grooves 4, 5 to suppress a leakage current flowing through P-N junction at both sides except the light emitting region.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] A laser having a structure in which a current limiting layer is provided to suppress leakage current of a double channel buried laser and a method for manufacturing the same are proposed.

[Industrial application field]

The present invention relates to a buried heterostructure (BH) laser that is formed by forming two grooves in a multilayer semiconductor crystal having a double heterojunction (DH) and performing buried growth on the grooves, and the leakage current The present invention relates to a semiconductor laser having a structure capable of high-speed response with little noise, and a method for manufacturing the same.

This type of laser is used for optical communications, and currently there are 400
Modulation on the order of Mbit/sec is applied, but as technology advances, there is a demand for lasers capable of even faster response.

[Conventional technology]

FIG. 3 is a sectional view showing the structure of a conventional double channel buried laser.

The figure shows DC-PBH (Double Channeled
-Planar BuriedHeterostruc
This structure is called ``true''.

In the figure, 1 is n-type indium y4 (n -1nP
) substrate, 2 is an active layer made of indium gallium arsenide phosphorus (In
3 is a cladding layer and is a p-1nP layer.

There are two grooves on both sides of the light emitting region of the multilayer structure.
nel) 4.5, and cover the trench with p-
The InP layer 6, the n-1nP layer 7, and the p-InP layer 8 are buried.

A contact layer of p”-InGa is formed on these buried layers.
Deposit AsP FJ 4.

In this structure, since there is a current path indicated by the dotted arrow, the threshold current near room temperature increases, and for the following reasons, the InGaA
Accumulation of carriers occurs in sP N 2, and this I
Since the nGaAsP layer 2 occupies a large area on both sides of the groove, the amount of accumulated carriers becomes large, making it impossible to achieve high-speed response.

That is, since InGaAsP has a smaller forbidden band width than InP, carrier confinement also occurs in the InGaAs 1' layer 2 outside the light emitting region. However, since no laser light is emitted here, carriers have a long lifetime and are accumulated.

If high-speed modulation is applied in such a state, there will be a difference in response characteristics between the current flowing in the InGaAsP Pi 2 other than the light-emitting region and the current flowing in the light-emitting region, and as a result, it will not be possible to follow the high-speed modulation.

On the other hand, in this structure, leakage current flows through the pn heterojunction on both sides of the region other than the light emitting region. In addition, since the rise voltage of a heterojunction is lower than that of a homojunction, the leakage current becomes large.

[Problem that the invention seeks to solve]

In conventional buried lasers, leakage current occurs through the active layer outside the light-emitting region, which hinders low threshold voltage and high-speed response.

[Means for solving problems]

A solution to the above problem is to provide a first semiconductor multilayer having a double heterojunction with two grooves (4) and (5) extending through the junction.
) and grown to cover the liquid grooves, the inner region divided by the liquid grooves (4) and (5) is the light emitting region, and the liquid grooves (4), (5) a semiconductor laser according to the present invention, comprising a semiconductor layer (12) in an outer region of the semiconductor layer (12) that differs in one or more of composition, conductivity, and carrier concentration from the first and second semiconductor multilayers; A fourth semiconductor layer (12) having one or more of composition, conductivity, and carrier concentration different from that of the first half-gate body N (1) is provided on at least a region other than the light emitting region on the first semiconductor layer (1). forming the first semiconductor layer (1) on the entire surface of the first semiconductor layer (1), covering the fourth semiconductor layer (12);
a second semi-quaternary layer (2) with a smaller forbidden band width; a third semiconductor layer (2) with a larger forbidden band width than the second semiconductor layer (2);
3), and the step of growing the third semiconductor layer (3), the second semiconductor layer (2), and the fourth semiconductor on both sides of the light emitting region]'! Two grooves (4) and (5) are formed so as to penetrate through the liquid groove (12) and reach the first semiconductor layer (1).
) and (5) growing a semiconductor multilayer over the semiconductor laser according to the present invention.

[Effect]

The present invention provides a high-resistance semiconductor layer for current limiting on the flat surface outside the two grooves to control leakage current that does not contribute to light emission.

Although the liquid phase epitaxy (LPE) method is advantageous for growth performed by burying trenches, it is difficult to grow a high-resistance layer.

However, the above growth on a flat surface cannot be achieved using the LPE method (
That's fine.

Vapor phase epitaxy (VPE) method, sheet metal chemical vapor deposition (MO-
CVD) method or molecular beam epitaxy (MBB)
Focusing on the fact that a high-resistance layer can be easily obtained by depositing on a flat surface using these methods, we deposited a high-resistance layer, such as a pn superlattice layer, on a flat area outside the groove in a double-channel light emitting device using these methods. Leakage current is suppressed by inserting a semiconductor layer.

〔Example〕

FIG. 1 is a sectional view illustrating the structure of a double channel buried laser according to the first invention.

In the figure, as the first semiconductor multilayer, l is an n-InP substrate 1 serving as a substrate and cladding layer, and InGaAsP is an active layer.
Layer 2, a cladding p-1nP layer 3 is formed, two grooves 4.5 are formed on both sides of the light emitting region of the multilayer structure, and a buried layer is formed as a second semiconductor multilayer over the grooves. p-1 of
An nPl' 56, an n-1nP layer 7, a p-1nP layer 8, and a p''-InGaAsP layer 4 as a contact layer are formed.

The above is exactly the same as the conventional example shown in FIG. 3, but the feature of the present invention is that, for example, an AlInAs layer 12 is formed as a semiconductor layer for current limiting on the flat part outside the groove 4.5. It is a point.

The high resistance AlInAs layer 12 can suppress the leakage current shown by the dotted arrow in FIG.

FIGS. 2(1) to 2(5) are cross-sectional views showing the structure of a double channel buried laser according to the second invention in the order of manufacturing steps.

In Fig. 2 (1), the substrate and cladding layer has a surface index (100), a thickness of 500 μm, and a size of 20 × 20
MO-CV using trimethylaluminum (TM^l) on n-1nP substrate (first semiconductor layer) 1 of
By D method, lattice matching with InP2, resistivity 103Ω
An aluminum indium arsenide (A1) nAs) layer (fourth semiconductor layer > 12 cm) with a thickness of 1.5 μm is grown.

In FIG. 2 (2), using a normal photo process,
A silicon dioxide (SiO□) film deposited by sputtering to a thickness of 3,000 mm was used as a mask, and a mixture of Brz:HBr:HzO=i:17:34° was used as an etchant, and the cleavage plane was etched perpendicularly to the (100) cleavage plane. The AlInAs layer 12 is selectively removed in a stripe shape with a width of 4 .mu.m in the direction shown in FIG.

In FIG. 2 (3), the peak wavelength λP of the photoluminescence (PL) of the active layer is determined by the LPE method.
0.15 μm thick undoped InGaAsP Ft lattice matched to InP at L = 1.285/J m
(Second semiconductor layer) 2, 0.5μ thick as cladding layer
m, cadmium (Cd) doped, carrier concentration 5X10
1? A p-In9 layer (third semiconductor layer) 3 of cm-3 is continuously grown.

Figure 2 (4) Odor "i', photoresist (AZ-1)
350J) as a mask, and bromine (U) as an etchant.
rz) system using Brz (1% by volume)-methanol solution,
A mesa with a width of 1.5 .mu.m is left in a stripe shape at the center of the opening of the AlInAs layer 1), and grooves 4.5 with a width of about 8 .mu.m and a depth of about 2.5 .mu.m are formed on both sides.

In Fig. 2 (5), the trench is covered by the LPE method as in a normal double channel laser, and the buried layer is doped with zinc (Zn) and the carrier concentration is 3×lO1″c1)−3.
p-1nP layer 6, tellurium (Te) doped, n-InP@7 with carrier concentration I x 10"cm-',
Zn-doped, carrier concentration 3 x 10"cm-'
Three layers of p -1nP layer 8, λPL = 1.29 μm as a contact layer, Zn doping, p ” -jnG with carrier concentration lXl0"cm-'
A total of four aAsP layers 9 are successively grown to a thickness of 0.5 μm at the flat portion outside the trench to form a buried structure.

On the substrate formed as described above, a p-side electrode 10, a three-layer film of titanium/platinum/gold (Ti/Pt/Au) on the p-type side,
An n-side electrode 1) was formed on the mold side using a gold-germanium (Au-Ge) alloy, and the characteristics of a laser diode fabricated with a cavity length of 300 μm and perpendicular to the plane of the paper were investigated.

The threshold current is It, the drive current is 14, and 1 a
/ I th ~ = 1.05°, the light intensity is 3 dB
If the falling frequency is f as the cutoff frequency, I th = 16 mA, f = 2.
0Gllz.

Met.

Lasers not according to the invention of the same dimensions and processed at the same time had I th = 18 mA, f = 1.3 Gl (z.

Met.

As described above, the characteristics were improved.

In the example, an AllnAs layer was used as the fourth semiconductor layer of the current limiting layer, but instead of this, a high resistance 1nAs layer was used.
PN, InGaAsP Pi, or PN multilayer superlattice stones may also be used.

In the embodiment, the application was made to an InP/'NnGaAsP laser diode, but other semiconductor materials such as gallium arsenide/gallium aluminum arsenide (GaAs/GaAIA
The present invention is also applicable to s) type laser diodes.

In addition, we used a substrate with a corrugation grating,
The present invention is also applicable to a distributed feedback laser diode in which a light guide layer is provided between the substrate and the active layer.

〔Effect of the invention〕

As explained in detail above, according to the present invention, leakage current flowing to areas other than the light emitting region in an embedded laser is blocked,
Low threshold and high-speed response are possible.

[Brief explanation of drawings]

FIG. 1 is a sectional view illustrating the structure of a double channel buried laser according to the first invention, and FIGS. FIG. 3 is a cross-sectional view showing the structure of a conventional double channel buried laser. In the figure, 1 is a substrate and a cladding layer, which is an n-InP layer, 2 is an active layer, which is an InGaAsP layer, and 3 is a cladding layer, which is a p-1nP layer. 4.5 is a groove, 6 is a buried layer and p-InP layer, 7 is a buried layer and is an n-InP layer, 8 is a buried layer and is a p-InP layer, 9 is a contact layer and is a p''-InGaAsP layer, 10 is the p-side electric machine, 1) is the njJA electric wire, 12 is the description of the semiconductor layer for current limiting /)

Claims (2)

[Claims] (1) In a first semiconductor multilayer having a double heterojunction, two grooves (4) and (5) are formed through the junction, and from a second semiconductor multilayer grown covering the grooves. In the structure, the inner region divided by the grooves (4) and (5) is the light emitting region, and the outer region of the grooves (4) and (5) has one of composition, conductivity, and carrier concentration. A semiconductor laser characterized in that the above has a semiconductor layer (12) different from the first and second semiconductor multilayers. (2) A fourth semiconductor layer (12) having one or more of composition, conductivity, and carrier concentration different from that of the first semiconductor layer (1) at least in a region other than the light emitting region on the first semiconductor layer (1). )
forming the first semiconductor layer (12) over the fourth semiconductor layer (12);
1) Over the entire upper surface, a second semiconductor layer (2) having a smaller forbidden band width than the first semiconductor layer (1);
A step of growing a third semiconductor layer (3) having a larger forbidden band width, and growing the third semiconductor layer (3), the second semiconductor layer (2) and the fourth semiconductor layer on both sides of the light emitting region. Two grooves (4), (
5) and growing a semiconductor multilayer covering the grooves (4) and (5).