JPS6360518A - Growing method for crystal of semiconductor layer - Google Patents
Growing method for crystal of semiconductor layerInfo
- Publication number
- JPS6360518A JPS6360518A JP20440386A JP20440386A JPS6360518A JP S6360518 A JPS6360518 A JP S6360518A JP 20440386 A JP20440386 A JP 20440386A JP 20440386 A JP20440386 A JP 20440386A JP S6360518 A JPS6360518 A JP S6360518A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- thin film
- annealing
- amorphous
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 59
- 239000013078 crystal Substances 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims abstract description 11
- 239000010409 thin film Substances 0.000 claims abstract description 31
- 238000000137 annealing Methods 0.000 claims abstract description 28
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 150000002500 ions Chemical class 0.000 claims abstract description 6
- 230000007935 neutral effect Effects 0.000 claims abstract description 6
- 229910052710 silicon Inorganic materials 0.000 abstract description 8
- 239000010703 silicon Substances 0.000 abstract description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 4
- -1 silicon ions Chemical class 0.000 abstract description 4
- 238000005468 ion implantation Methods 0.000 abstract description 3
- 239000010453 quartz Substances 0.000 abstract description 3
- 230000005855 radiation Effects 0.000 abstract 2
- 230000001678 irradiating effect Effects 0.000 abstract 1
- 238000002109 crystal growth method Methods 0.000 description 10
- 238000010438 heat treatment Methods 0.000 description 8
- 238000005224 laser annealing Methods 0.000 description 7
- 239000010408 film Substances 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 238000001228 spectrum Methods 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005280 amorphization Methods 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 238000010884 ion-beam technique Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- SYHGEUNFJIGTRX-UHFFFAOYSA-N methylenedioxypyrovalerone Chemical compound C=1C=C2OCOC2=CC=1C(=O)C(CCC)N1CCCC1 SYHGEUNFJIGTRX-UHFFFAOYSA-N 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Landscapes
- Recrystallisation Techniques (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置等の製造工程におけるアニールに
よる半導体層の結晶形成方法に関し、特に薄膜の半導体
層の結晶形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for forming crystals of a semiconductor layer by annealing in the manufacturing process of semiconductor devices, and particularly to a method for forming crystals of a thin film semiconductor layer.
本発明は、基板上に形成された薄膜半導体層を非晶質化
して、光照射アニールを施す半導体層の結晶成長方法に
おいて、非晶質化した薄膜半導体層を加熱処理してから
上記光照射アニールを施ずことにより、その薄膜半導体
層の平坦化等を実現するものである。The present invention provides a crystal growth method for a semiconductor layer in which a thin film semiconductor layer formed on a substrate is made amorphous and subjected to light irradiation annealing, in which the amorphous thin film semiconductor layer is heat-treated and then the light irradiation is annealed. By performing annealing, the thin film semiconductor layer can be planarized.
半導体装置の！！！！造技術、特に８００Å以下の超薄
膜からなる薄膜半導体層を形成するものにおいては、デ
バイスの特性の向上等のために、結晶粒径（ダレインサ
イズ）を成長させるアニールが行われる。Semiconductor equipment! ! ! ! BACKGROUND ART In manufacturing techniques, particularly those for forming thin film semiconductor layers made of ultra-thin films of 800 Å or less, annealing is performed to grow crystal grain size (delein size) in order to improve device characteristics.
ここで、このような超薄膜の薄膜半導体層を用いた半導
体層の結晶成長方法について簡ｉｉ’−に説明すると、
まず、所定のデバイスを形成すべき基板例えばシリコン
基板上に、ＣＶＤ、（化学気相成長）法等により薄膜の
多結晶シリコン層が形成される。次に、この薄膜の多結
晶シリコン層に対し。Here, a method of crystal growth of a semiconductor layer using such an ultra-thin film semiconductor layer will be briefly explained.
First, a thin polycrystalline silicon layer is formed on a substrate, such as a silicon substrate, on which a predetermined device is to be formed, by CVD, chemical vapor deposition (chemical vapor deposition), or the like. Next, for this thin polycrystalline silicon layer.
て、中性イオンである例えばシリコンイオンが注入され
、当該多結晶シリコン層の内部のグレイン（結晶粒）が
破壊されて当該多結晶シリコン層の全部または一部が非
晶質化する。このように非晶質化した′ｆ１膜の半導体
層に対して、光照射アニールとして例えばレーザーアニ
ールを施すことにより結晶核の形成を短時間で行い、所
定のグレイン成長を行わせ、そのダレインサイズを大き
くして特性の優れたデバイスの形成が可能となる。Then, neutral ions such as silicon ions are implanted, and the grains inside the polycrystalline silicon layer are destroyed and all or part of the polycrystalline silicon layer becomes amorphous. By applying light irradiation annealing such as laser annealing to the semiconductor layer of the 'f1 film that has been made amorphous in this way, crystal nuclei are formed in a short time, a predetermined grain growth is performed, and the duplex It is possible to increase the size and form a device with excellent characteristics.
このようなレーザービームの照射によるレーザーアニー
ルの場合には、中性イオンの注入によって非晶質化され
、結晶化し易い状態となっており、結晶核の短時間での
形成から短時間での結晶成長が可能である。In the case of laser annealing using such laser beam irradiation, neutral ions are implanted to make the material amorphous, making it easy to crystallize, resulting in rapid formation of crystal nuclei and crystallization in a short period of time. Growth is possible.
しかしながら、薄膜の半導体層に対して、このようなレ
ーザーアニールを施した場合には、当該薄膜の半導体層
の平坦性が得られないという問題が生ずる。However, when such laser annealing is applied to a thin semiconductor layer, a problem arises in that flatness of the thin semiconductor layer cannot be obtained.
この点について実験に基づき第２図を参照しながら説明
する。第２図は、石英基板上に膜厚８００人の多結晶シ
リコン層を形成したものに、注入条件４０ｋｅＶ、５Ｘ
１０Ｉ５／ｅｊｔ’ｚ＋Ｊコフイ、ｔンを注入したもの
の曲線りと、それをさらにエキシマ−レーザー（エネル
ギー１５０〜２００ｍＪ／ｃａｌ、波長２４９ｎｍ、パ
ルス幅２０ｎｓｅｃの各条件）を用いてアニールしたも
の曲線Ｃを示している。なお、第２図の横軸は紫外反射
スペクトルであり、縦軸は反射率である。This point will be explained based on experiments with reference to FIG. Figure 2 shows a polycrystalline silicon layer formed on a quartz substrate with a thickness of 800 nm, implanted under 40 keV,
10I5/ejt'z+J cofi, t, and the curve C obtained by annealing it using an excimer laser (energy 150 to 200 mJ/cal, wavelength 249 nm, pulse width 20 nsec). It shows. Note that the horizontal axis in FIG. 2 is the ultraviolet reflection spectrum, and the vertical axis is the reflectance.
この短波長の反射率が小さい値であればあるほど、その
薄膜の半導体層の平坦性は低く、表面の凹凸が大きいこ
とを示しており、そして、曲線Ｃ２曲＆％Ｄの双方とも
表面の平坦の度合を示す２００ｎｍ程度のところの反射
率は、７２％以下の値しか得られておらず、さらにこの
部分で曲線りのほうが曲線Ｃよりも低くなっているため
、レーザーアニールによって表面の平坦性が劣化してい
ることがわかる。このようにレーザーアニールによって
は表面の平坦性は低く、ＴＰＴ （薄膜トランジスタ）
等の薄膜デバイスの形成自体が容易でない等の問題点が
生じている。The smaller the reflectance of this short wavelength, the lower the flatness of the semiconductor layer of the thin film, and the larger the unevenness of the surface. The reflectance at about 200 nm, which indicates the degree of flatness, was only 72% or less, and the curve in this area was lower than curve C, so laser annealing was used to flatten the surface. It can be seen that the quality has deteriorated. In this way, the surface flatness is low depending on laser annealing, and TPT (thin film transistor)
Problems have arisen, such as the fact that it is not easy to form thin film devices such as these.
そこで、本発明は上述の問題点に鑑み、薄膜の半導体層
の平坦性を改善して半導体層の結晶成長を行う半導体層
の結晶成長方法の提供を目的とする。SUMMARY OF THE INVENTION In view of the above-mentioned problems, it is an object of the present invention to provide a method for growing a semiconductor layer by improving the flatness of a thin semiconductor layer.
本発明は、基板上に薄膜半導体層を形成し、中性イオン
を注入することにより該薄膜半導体層を非晶質化して、
該薄膜半導体層を光照射アニールする半導体層の結晶成
長方法において、上記基板上で非晶質化した薄膜半導体
層を加熱処理してから上記光照射アニールを施すことを
特徴とする半導体層の結晶成長方法により上述の問題点
を解決する。The present invention involves forming a thin film semiconductor layer on a substrate, making the thin film semiconductor layer amorphous by implanting neutral ions,
The crystal growth method for a semiconductor layer in which the thin film semiconductor layer is annealed with light irradiation, characterized in that the thin film semiconductor layer made amorphous on the substrate is heat-treated and then the light irradiation annealed is performed. The growth method solves the above problems.
本発明の半導体層の結晶成長方法は、薄膜半導体層を非
晶質化した後、直ぐにレーザーアニール笠の光照射アニ
ールを行わず、非晶質の薄膜半導体層を加熱処理してか
ら光照射アニールを行って、急激な光照射アニールによ
る結晶成長を緩和して、表面の平坦性の改善を図ること
ができる。In the crystal growth method of a semiconductor layer of the present invention, after the thin film semiconductor layer is made amorphous, the light irradiation annealing of the laser annealing shade is not performed immediately, but the amorphous thin film semiconductor layer is heat treated and then the light irradiation annealing is performed. By performing this, crystal growth caused by rapid light irradiation annealing can be alleviated, and surface flatness can be improved.
本発明の好適な実施例を説明する。 A preferred embodiment of the present invention will be described.
本実施例の半導体層の結晶成長方法は、レーザーアニー
ル等の光照射アニールの前に、プレアニールとして電気
炉による加熱処理を施しているため、平坦性の良好な薄
膜半導体層を得ることができるものである。In the crystal growth method of the semiconductor layer of this example, heat treatment is performed in an electric furnace as pre-annealing before light irradiation annealing such as laser annealing, so that a thin film semiconductor layer with good flatness can be obtained. It is.
先ず、本実施例の半導体層の結晶成長方法においては、
例えばシリコン基板や石英基板等の基板上に、薄膜の半
導体層を形成する。この薄膜の半導体層としては、例え
ばＣＶＤ法等により形成される多結晶シリコン層であり
、また、プラズマＣＶＤ法等により非晶質即ちアモルフ
ァス状のシリコン層であっても良い、この薄膜の半導体
層の膜厚は、例えば８００Å以下の超薄膜の半導体装置
あって、シリコン基板の場合には、シリコン酸化膜を介
して被着形成することでＴＰＴデバイスの形成が可能と
なる。First, in the crystal growth method of the semiconductor layer of this example,
For example, a thin semiconductor layer is formed on a substrate such as a silicon substrate or a quartz substrate. This thin film semiconductor layer is, for example, a polycrystalline silicon layer formed by a CVD method or the like, or may be an amorphous silicon layer formed by a plasma CVD method or the like. For ultra-thin semiconductor devices with a film thickness of, for example, 800 Å or less, in the case of a silicon substrate, a TPT device can be formed by depositing the film through a silicon oxide film.
次に、中性イオンとして例えばシリコンイオンを上記薄
膜半導体層に注入する。このイオン注入によって当該薄
膜半導体層を非晶質化することができる。このイオン注
入の条件としては、例えば注入エネルギー４ Ｑ ｋ
ｅ Ｖ、注入１５Ｘ１０Ｉ５／−の条件で行うことがで
きる。Next, neutral ions such as silicon ions are implanted into the thin film semiconductor layer. This ion implantation can make the thin film semiconductor layer amorphous. The conditions for this ion implantation are, for example, implantation energy 4 Q k
eV, the implantation can be performed under the conditions of 15×10I5/−.
このような薄膜半導体層の非晶質化の後、光照射アニー
ルを直ぐに行うのではなく、プレアニールとして例えば
電気炉による加熱処理を施す、この加熱処理の場合には
、例えば窒素雲囲気中において、温度６００℃或いは６
００℃以下、１０時間乃至２０時間の条件で行うことが
できる。なお、この加熱処理では、上記電気炉を用いた
アニールに限定されず、弱いエネルギー例えば５０ｍＪ
／備以下のエキシマレーザ−を用いても良い。After such amorphization of the thin film semiconductor layer, instead of immediately performing light irradiation annealing, heat treatment is performed as pre-annealing using, for example, an electric furnace.In the case of this heat treatment, for example, in a nitrogen cloud atmosphere, Temperature 600℃ or 6
This can be carried out at a temperature of 00° C. or lower for 10 to 20 hours. Note that this heat treatment is not limited to annealing using the above-mentioned electric furnace, and may be performed using a weak energy such as 50 mJ.
An excimer laser with the following specifications may also be used.
そして、本実施例の半導体層の形成方法では、このよう
なプレアニールとしての加熱処理を施したのちに、光照
射アニールを行う。この光照射アニールとしては、エキ
シマ−レーザー（エネルギー１５０〜２００ｍＪ／ａｄ
、波長２４９ｎｍ、パルス幅２０ｎｓｅｃ）を用いるこ
とができる他、電子ビームやイオンビーム或いはハロゲ
ンランプ等のランプを用いたアニールであっても良い。In the method for forming a semiconductor layer of this embodiment, after such heat treatment as pre-annealing is performed, light irradiation annealing is performed. For this light irradiation annealing, an excimer laser (energy 150 to 200 mJ/ad
, a wavelength of 249 nm, and a pulse width of 20 nsec), or annealing using an electron beam, an ion beam, or a lamp such as a halogen lamp may be used.
このような工程によって本実施例の半導体層の結晶成長
方法は、所要のグレイン成長を行わせることができるが
、特に上述の加熱処理によって、急激な光照射アニール
による結晶成長を緩和して、表面の平坦性の改善を図る
ことができるものである。Through such steps, the crystal growth method of the semiconductor layer of this embodiment can perform the required grain growth, but in particular, the above-mentioned heat treatment relaxes the crystal growth caused by rapid light irradiation annealing, and the surface This makes it possible to improve the flatness of the surface.
この加熱処理の有効性については、実験結果が得られて
おり、これを第１図に示す。第１図は、第２図にデータ
として示した石英基板上に膜ｙ７−８００人の多結晶シ
リコン層を形成したものに、注入条件４０ｋｅＶ、５Ｘ
１０古／ｄでシリコンイオンを注入し、先ず、上記加熱
処理（電気炉、６００℃、２０時間の各条件を施したも
のの曲線Ｂと、それをさらにエキシマ−レーザー〈エネ
ルギー１ロ０ｍＪ／ｃｊ、波長２４９ｎｍ、パルス幅２
０ｎｓｅｃの各条件）を用いてアニールしたもの曲線Ａ
を示している。なお、第１図の横軸は紫外反射スペクト
ルであり、縦軸は反射率である。Experimental results have been obtained regarding the effectiveness of this heat treatment, and are shown in FIG. Figure 1 shows the implantation conditions of 40 keV, 5
Silicon ions were implanted at 100 mJ/d, and first, curve B was obtained by applying the above heat treatment (electric furnace, 600°C, 20 hours), and then it was further heated using an excimer laser (energy 1 RO 0 mJ/cj, Wavelength 249nm, pulse width 2
Curve A obtained by annealing using each condition (0 nsec)
It shows. Note that the horizontal axis in FIG. 1 is the ultraviolet reflection spectrum, and the vertical axis is the reflectance.
この第１図に示した結果から、曲線Ａ１曲線Ｂの双方と
も表面の平坦性の度合を示す２００ｎｍ程度のところの
反射率は、７５％程度の値となっており、これは第２図
と比較してみても、その反射率が向上しており、当該薄
膜半導体層の表面の平坦性が改善されていることが示さ
れる。また、曲線Ｂと曲線Ａの表面の平坦性の度合を示
す２００ｎｍ程度のところの反射率の差は、第２図と比
較してみても、その差が小さく、従って、レーザー照射
による平坦性の劣化の度合が小さいことがわかる。From the results shown in Figure 1, the reflectance at about 200 nm, which indicates the degree of surface flatness, for both curves A and B is about 75%, which is similar to Figure 2. A comparison shows that the reflectance is improved, and the flatness of the surface of the thin film semiconductor layer is improved. In addition, the difference in reflectance at about 200 nm, which indicates the degree of surface flatness between curve B and curve A, is small even when compared with Figure 2, and therefore the flatness due to laser irradiation is small. It can be seen that the degree of deterioration is small.
以上のように、本実施例の半導体層の結晶成長方法では
、薄膜半導体層を非晶質化した後、非晶質のｇｌ、膜半
導体層を加熱処理してから光照射アニールを行うため、
２激な光照射アニールによる結晶成長を緩和して、表面
の平坦性の改善を図ることができ、本実施例の半４体層
の結晶成長方法を半導体装置の製造工程に適用すること
で良好な特性のデバイス、特にＴＰＴ等の薄ｎりのデバ
イスを量産することができる。As described above, in the crystal growth method of the semiconductor layer of this embodiment, after the thin film semiconductor layer is made amorphous, the amorphous GL and film semiconductor layer are heat-treated and then light irradiation annealing is performed.
2) The crystal growth caused by intense light irradiation annealing can be alleviated and the surface flatness can be improved, and by applying the crystal growth method of the semi-quaternary layer of this example to the manufacturing process of semiconductor devices, it is possible to improve the surface flatness. It is possible to mass produce devices with excellent characteristics, especially thin devices such as TPT.
本発明の半導体層の結晶成長方法は、薄膜半導体層を非
晶質化した後、非晶質のｇＪ膜半導体層を加熱処理して
から光照射アニールを行うため、急激な光照射アニール
による結晶成長を緩和して、表面の平坦性の改善を図る
ことができ、良好な特性のデバイスを形成する場合に有
利である。In the crystal growth method of a semiconductor layer of the present invention, after the thin film semiconductor layer is made amorphous, the amorphous gJ film semiconductor layer is heat-treated and then light irradiation annealing is performed. Growth can be relaxed and surface flatness can be improved, which is advantageous when forming a device with good characteristics.
第１図は本発明の半導体層の結晶成長力→去を用いた場
合の半導体層の紫外反射スペクトルと反射率の関係を示
す特性図である。また、第２図は従来の半導体層の結晶
成長方法を用いた場合の半導体層の紫外反射スペクトル
と反射率の関係を示す特性図である。FIG. 1 is a characteristic diagram showing the relationship between the ultraviolet reflection spectrum and the reflectance of the semiconductor layer when the crystal growth force of the semiconductor layer of the present invention is changed from one to the other. Furthermore, FIG. 2 is a characteristic diagram showing the relationship between the ultraviolet reflection spectrum and reflectance of a semiconductor layer when a conventional semiconductor layer crystal growth method is used.
Claims (1)
ことにより該薄膜半導体層を非晶質化して、該薄膜半導
体層を光照射アニールする半導体層の結晶成長方法にお
いて、 上記基板上で非晶質化した薄膜半導体層を加熱処理して
から上記光照射アニールを施すことを特徴とする半導体
層の結晶成長方法。[Claims] A method for crystal growth of a semiconductor layer, which comprises forming a thin film semiconductor layer on a substrate, making the thin film semiconductor layer amorphous by implanting neutral ions, and annealing the thin film semiconductor layer by light irradiation. A method for growing crystals of a semiconductor layer, characterized in that the thin film semiconductor layer made amorphous on the substrate is heat-treated and then subjected to the light irradiation annealing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61204403A JP2696818B2 (en) | 1986-08-30 | 1986-08-30 | Semiconductor layer crystal growth method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61204403A JP2696818B2 (en) | 1986-08-30 | 1986-08-30 | Semiconductor layer crystal growth method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6360518A true JPS6360518A (en) | 1988-03-16 |
| JP2696818B2 JP2696818B2 (en) | 1998-01-14 |
Family
ID=16489965
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61204403A Expired - Lifetime JP2696818B2 (en) | 1986-08-30 | 1986-08-30 | Semiconductor layer crystal growth method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2696818B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03109717A (en) * | 1989-09-23 | 1991-05-09 | Canon Inc | Forming of semiconductor thin film |
| US6753213B2 (en) | 1994-07-28 | 2004-06-22 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing method |
| US6919237B2 (en) | 1994-06-02 | 2005-07-19 | Semiconductor Energy Laboratory Co., Ltd. | Process for fabricating thin film transistors |
| JP2006024946A (en) * | 2004-07-08 | 2006-01-26 | Samsung Electronics Co Ltd | Manufacturing method of polycrystalline silicon and manufacturing method of semiconductor element utilizing the same |
| US7767559B2 (en) | 1994-06-02 | 2010-08-03 | Semiconductor Energy Laboratory Co., Ltd. | Process for fabricating semiconductor device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5893216A (en) * | 1981-11-30 | 1983-06-02 | Toshiba Corp | Manufacture of semiconductor device |
| JPS59155121A (en) * | 1983-02-24 | 1984-09-04 | Toshiba Corp | Manufacture of semiconductor thin film |
| JPS6178120A (en) * | 1984-09-25 | 1986-04-21 | Sony Corp | Manufacture of thin film single crystal |
-
1986
- 1986-08-30 JP JP61204403A patent/JP2696818B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5893216A (en) * | 1981-11-30 | 1983-06-02 | Toshiba Corp | Manufacture of semiconductor device |
| JPS59155121A (en) * | 1983-02-24 | 1984-09-04 | Toshiba Corp | Manufacture of semiconductor thin film |
| JPS6178120A (en) * | 1984-09-25 | 1986-04-21 | Sony Corp | Manufacture of thin film single crystal |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03109717A (en) * | 1989-09-23 | 1991-05-09 | Canon Inc | Forming of semiconductor thin film |
| US6919237B2 (en) | 1994-06-02 | 2005-07-19 | Semiconductor Energy Laboratory Co., Ltd. | Process for fabricating thin film transistors |
| US7470575B2 (en) | 1994-06-02 | 2008-12-30 | Semiconductor Energy Laboratory Co., Ltd. | Process for fabricating semiconductor device |
| US7767559B2 (en) | 1994-06-02 | 2010-08-03 | Semiconductor Energy Laboratory Co., Ltd. | Process for fabricating semiconductor device |
| US6753213B2 (en) | 1994-07-28 | 2004-06-22 | Semiconductor Energy Laboratory Co., Ltd. | Laser processing method |
| JP2006024946A (en) * | 2004-07-08 | 2006-01-26 | Samsung Electronics Co Ltd | Manufacturing method of polycrystalline silicon and manufacturing method of semiconductor element utilizing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2696818B2 (en) | 1998-01-14 |
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Legal Events
| Date | Code | Title | Description |
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| EXPY | Cancellation because of completion of term |