JPH03250621A - Manufacture of semiconductor film - Google Patents

Manufacture of semiconductor film

Info

Publication number
JPH03250621A
JPH03250621A JP11657290A JP11657290A JPH03250621A JP H03250621 A JPH03250621 A JP H03250621A JP 11657290 A JP11657290 A JP 11657290A JP 11657290 A JP11657290 A JP 11657290A JP H03250621 A JPH03250621 A JP H03250621A
Authority
JP
Japan
Prior art keywords
semiconductor film
substrate
film
crystal
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11657290A
Other languages
Japanese (ja)
Other versions
JP2800060B2 (en
Inventor
Keiji Oyoshi
啓司 大吉
Shuhei Tanaka
修平 田中
Tomonori Yamaoka
智則 山岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Sheet Glass Co Ltd
Original Assignee
Nippon Sheet Glass Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Sheet Glass Co Ltd filed Critical Nippon Sheet Glass Co Ltd
Priority to JP11657290A priority Critical patent/JP2800060B2/en
Priority to ITMI911181A priority patent/IT1248789B/en
Priority to DE4114162A priority patent/DE4114162A1/en
Priority to GB9109508A priority patent/GB2244284B/en
Priority to FR9105415A priority patent/FR2661779A1/en
Publication of JPH03250621A publication Critical patent/JPH03250621A/en
Application granted granted Critical
Publication of JP2800060B2 publication Critical patent/JP2800060B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To form a polycrystalline semiconductor film having large and uniform grain size or to realize a hetero epitaxial growth at a low temperature by so ion implanting from the surface of an amorphous semiconductor film containing crystal formed on a substrate as to make the projecting distance of the implanted ions longer than the thickness of the amorphous film. CONSTITUTION:An amorphous semiconductor film 2 containing a crystal phase 3 is formed on a substrate 1. For example, the nuclei of the phase 2 is partly formed on the film 2 deposited on the substrate 1 by a plasma CVD, a thermal CVD, etc., by ion implanting. The accelerating energy of the ions to be implanted from the surface of the film 2 is so set that the projecting stroke of the element to be implanted is larger than the thickness of the semiconductor film and the effect of converting to amorphous state due to cascade collision of the implanted ions to the atoms of the semiconductor film and a defect density in a region crystallized in the semiconductor film are reduced. The power density of the ion beam is desirably 0.5-1W/cm<2>. If the power density of the beam is low, the crystal growing speed can be increased by heating the substrate 1(at 50-800 deg.C) when it is ion implanted.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、非晶質相をもつ半導体膜を結晶化する方法に
関し、特にイオンビームを用い結晶相を成長させ、均一
で制御された粒径をもつ多結晶半導体膜を形成する方法
に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for crystallizing a semiconductor film having an amorphous phase, and in particular to a method for growing a crystalline phase using an ion beam to produce uniform and controlled grains. The present invention relates to a method for forming a polycrystalline semiconductor film having a diameter.

[従来の技術] 従来、イオンビームを用いた結晶成長に関して、珪素基
板上に形成した非晶質珪素を砒素のイオン注入により固
相エビタ牛/ヤル成長させた例(Jpn、  J、  
Appl、  Phys、  21  (1982)S
uppl、  21−1.p211)やキセノンのイオ
ン注入と注入時の基板加熱を組み合わせた例(Nucl
ear  Instrum、Meth。
[Prior Art] Conventionally, regarding crystal growth using an ion beam, there is an example in which amorphous silicon formed on a silicon substrate is grown in a solid phase by arsenic ion implantation (Jpn, J.
Appl, Phys, 21 (1982)S
uppl, 21-1. p211) and an example of combining xenon ion implantation and substrate heating during implantation (Nucl
ear Instrument, Meth.

ds  Res、B  1,9/20 (1987)I
)457)がある。また、ガラス基板上の半導体膜とイ
オン注入に関して、石英ガラス上に堆積した多結晶ゲル
マニウム膜あるい珪素膜に、ゲルマニウムあるい珪素を
それぞれ加熱しながらイオン注入し、粒径を大きくさせ
た例(Appl、phys、  64  (1,988
)  p2337)  がある。
ds Res, B 1, 9/20 (1987) I
)457). Regarding semiconductor films and ion implantation on glass substrates, we also have an example in which ions are implanted into a polycrystalline germanium film or silicon film deposited on quartz glass while heating germanium or silicon to increase the grain size ( Appl, phys, 64 (1,988
) p2337).

これらイオンビームを用いた例は、他の方法に比べ、低
温で固相成長を行うことが可能であり、半導体プロセス
の低温化や三次元集積回路への応用が期待されている。
These examples using ion beams can perform solid phase growth at lower temperatures than other methods, and are expected to be applied to lower temperature semiconductor processes and three-dimensional integrated circuits.

[発明が解決しようとする課題] しかしながら、上記従来のイオンビームを用いた結晶成
長法は、注入イオンの投影飛程を膜中央に設定している
ため、非晶質化と結晶化が平衡に達する温度が高く、結
晶粒を成長させるためにイオン注入時の基板温度を高く
する必要があった。
[Problem to be solved by the invention] However, in the conventional crystal growth method using an ion beam, the projected range of implanted ions is set at the center of the film, so amorphization and crystallization are not balanced. The temperature reached is high, and it was necessary to raise the substrate temperature during ion implantation in order to grow crystal grains.

例えば、多結晶珪素膜について、少なくとも800°C
以上の注入時の基板加熱が必要であり、この温度に耐え
られない材料を半導体膜の基板として使用した場合、基
板形状の変形や基板構成元素の半導体膜への拡散が起き
るといった重大な問題があった。
For example, for polycrystalline silicon films, at least 800°C
It is necessary to heat the substrate during the above-mentioned implantation, and if a material that cannot withstand this temperature is used as a substrate for a semiconductor film, serious problems such as deformation of the substrate shape and diffusion of substrate constituent elements into the semiconductor film may occur. there were.

また、熱処理により固相で結晶核を形成する公知の方法
では、たとえば、非晶質珪素膜については、少なくとも
600℃以上の高い温度が必要である。
Further, in the known method of forming crystal nuclei in a solid phase by heat treatment, a high temperature of at least 600° C. or higher is required for, for example, an amorphous silicon film.

[課題を解決するための手段] 本発明は、基板上に結晶を含む非晶質半導体膜を形成す
る工程と、前記形成された非晶質半導体膜の表面から、
注入イオンの投影飛程が前記非晶質半導体膜の膜厚より
大きくなるようにイオン注入する結晶成長工程とを含む
、基板上に多結晶半導体膜を製造する方法である。
[Means for Solving the Problems] The present invention includes a step of forming an amorphous semiconductor film containing crystals on a substrate, and a step of forming an amorphous semiconductor film containing crystals on a substrate, and
This is a method for manufacturing a polycrystalline semiconductor film on a substrate, including a crystal growth step of implanting ions so that the projected range of the implanted ions is larger than the film thickness of the amorphous semiconductor film.

結晶相を含む非晶質半導体膜の形成は、例えば公知のプ
ラズマCVD、熱CVD等により、結晶核を含む半導体
膜を基板上に堆積するか、基板上に堆積した非晶質半導
体膜にイオン注入により部分的に結晶相の核形成を行う
ことで実現できる。
Formation of an amorphous semiconductor film containing a crystalline phase can be achieved by depositing a semiconductor film containing crystal nuclei on a substrate by, for example, known plasma CVD or thermal CVD, or by applying ions to an amorphous semiconductor film deposited on a substrate. This can be achieved by partially nucleating a crystalline phase through injection.

前記したイオン注入により部分的に結晶相の核形成をお
こなうには、注入するイオンの加速エネルギーは、注入
イオンの投影飛程が半導体膜の膜厚より大きくなるよう
に設定される。これにより、注入イオンと半導体膜の構
成原子のカスケード衝突による非晶質化の効果が小さく
なり、半導体膜中て結晶化させた領域内の欠陥密度が小
さく、良質の結晶核が得られる。加速エネルギーが前記
膜厚より小さいと、エネルギーデボジンヨンが大きい領
域で結晶核の形成密度は高(なるが、結晶核の結晶性は
前記条件より劣る。また、半導体膜内でイオンが届かな
い深さには結晶核が形成されない。イオンビームの電力
密度は、IW/crr+2以上が望ましい。前記電力密
度が小さい場合には、基板を加熱(50〜800℃)し
ながらイオン注入することで、結晶核を形成することも
可能である。
In order to partially nucleate the crystal phase by the ion implantation described above, the acceleration energy of the implanted ions is set so that the projected range of the implanted ions is greater than the thickness of the semiconductor film. This reduces the amorphous effect caused by cascade collisions between the implanted ions and the constituent atoms of the semiconductor film, reduces the defect density in the crystallized region of the semiconductor film, and provides crystal nuclei of good quality. If the acceleration energy is smaller than the above film thickness, the formation density of crystal nuclei will be high in regions where energy devotion is large (although the crystallinity of the crystal nuclei will be inferior to the above conditions). No crystal nuclei are formed in the ion beam.The power density of the ion beam is preferably IW/crr+2 or more.If the power density is low, crystal nuclei can be formed by implanting ions while heating the substrate (50 to 800°C). It is also possible to form a nucleus.

基板加熱が必要な電力密度の境界値(結晶核の生成率か
大きく変化する電力密度)は、半導体膜や基板の種類、
イオン種により大きく変化する。用いるイオン種は特に
限定されないか、結晶化させる半導体構成元素か基板構
成元素か希ガス元素か望ましい。また、上記した結晶相
の核形成をおこなうイオンビームの電流密度の望ましい
条件においても、結晶相の核形成に引きつつき結晶相の
成長を行うことかできるか、成長速度が早いため、初期
に形成された結晶核による結晶粒径と、末期に形成され
た結晶との粒径差が大きくなる。
The boundary value of the power density that requires substrate heating (the power density at which the rate of crystal nucleation changes significantly) depends on the type of semiconductor film and substrate,
It varies greatly depending on the ion species. The ion species used is not particularly limited, and is preferably a semiconductor constituent element to be crystallized, a substrate constituent element, or a rare gas element. In addition, even under the desirable conditions of the current density of the ion beam for nucleating the crystalline phase described above, it is possible to grow the crystalline phase while continuing the nucleation of the crystalline phase. The difference in grain size between the crystal grain size due to the crystal nucleus formed in the final stage and the grain size of the crystal formed at the final stage becomes large.

本発明にかかる非晶質半導体膜の表面からイオン注入す
る工程のイオンの加速エネルギーは、注入元素の投影飛
程が半導体膜の膜厚より大きくなるよう設定され、注入
イオンと前記半導体膜の構成原子のカスケード衝突によ
る非晶質化の効果が小さくなるように、かつ、半導体膜
中で結晶化させた領域内の欠陥密度が小さくなるように
設定される。注入元素の投影飛程が前記膜厚より小さい
と、半導体膜内でイオンが届かない部分が生じ、その部
分では結晶相の成長は起きにくい。イオンビームの電力
密度は0.5〜I W / c m 2が望ましい。前
記電力密度以上では結晶核の形成が起こり、結晶粒径の
制御性が低下する。前記電力密度が0゜5W・’ c 
m 2以上であれば、基板加熱を特に行うことなしに結
晶成長を行える。また、イオンビームの電力密度が低い
場合は、基板をイオン注入するときに加熱(50〜80
0℃)することで、結晶成長速度を大きくすることが可
能である。基板加熱が必要な電力密度の境界値は、半導
体膜や基板の種類等により変化する。半導体膜が珪素膜
の場合は、イオンビームによる加熱効果により珪素膜の
温度が200〜250℃となれば、基板加熱は必要では
ない。これ以下の温度では結晶相の成長よりは非晶質相
の成長が起こりやすいので、基板を外部ヒータにより加
熱してこの温度以上にすることが結晶相の成長に関して
重要である。注入するイオンの種類1才特に限定されな
いが結晶化させる半導体構成元素または基板構成元素か
希ガス元素が望ましい。
The ion acceleration energy in the step of ion implantation from the surface of the amorphous semiconductor film according to the present invention is set so that the projected range of the implanted element is larger than the film thickness of the semiconductor film, and the implanted ions and the semiconductor film are It is set so that the effect of amorphization due to cascade collisions of atoms is reduced and the defect density in the crystallized region of the semiconductor film is reduced. If the projected range of the implanted element is smaller than the film thickness, there will be parts in the semiconductor film where the ions cannot reach, and crystal phase growth will be difficult to occur in those parts. The power density of the ion beam is preferably 0.5 to IW/cm2. If the power density exceeds the above-mentioned power density, formation of crystal nuclei occurs, and controllability of crystal grain size deteriorates. The power density is 0゜5W・'c
If m 2 or more, crystal growth can be performed without particularly heating the substrate. In addition, if the power density of the ion beam is low, heating (50 to 80
0° C.), it is possible to increase the crystal growth rate. The boundary value of the power density required to heat the substrate changes depending on the type of semiconductor film and substrate, etc. If the semiconductor film is a silicon film, heating the substrate is not necessary if the temperature of the silicon film reaches 200 to 250° C. due to the heating effect of the ion beam. At a temperature below this temperature, growth of an amorphous phase is more likely to occur than growth of a crystalline phase, so it is important for the growth of a crystalline phase to heat the substrate with an external heater to a temperature above this temperature. The type of ion to be implanted is not particularly limited, but it is preferably a semiconductor constituent element to be crystallized, a substrate constituent element, or a rare gas element.

本発明は、前記した結晶を含む半導体膜を形成する工程
と、前記形成された非晶質半導体膜の表面からイオンを
注入する結晶成長工程との間に制御工程を設けることが
できる。制御工程は、前記結晶を含む半導体膜に含まれ
る結晶の一部を非晶質化することにより、つづく結晶成
長に先立ち、結晶の大きさまたは密度、または膜中での
空間的な配置を制御するために行われ、結晶粒径がより
大きく、かつそろった多結晶からなる半導体膜になるよ
うにイオンの注入が前記半導体膜の一部分についておこ
なわれる。打ち込むイオン電流密度ハ0.3〜0.7W
/cm2程度であることが望ましく、イオンの加速エネ
ルギーは、注入元素の投影飛程が半導体膜の膜厚と同程
度かそれより大きくなるよう設定することが望ましい。
In the present invention, a control step can be provided between the step of forming the semiconductor film containing the crystal described above and the crystal growth step of implanting ions from the surface of the formed amorphous semiconductor film. The control step involves controlling the size or density of the crystals or their spatial arrangement in the film prior to subsequent crystal growth by amorphizing a portion of the crystals included in the semiconductor film containing the crystals. Ion implantation is performed on a portion of the semiconductor film so as to form a polycrystalline semiconductor film with larger and more uniform crystal grain sizes. Implanting ion current density: 0.3 to 0.7W
The acceleration energy of the ions is preferably set so that the projected range of the implanted element is about the same as or larger than the thickness of the semiconductor film.

注入元素の投影飛程が前記膜厚より小さいと、半導体膜
内でイオンが届かない深さでは非晶質化は起きないので
望ましくない。  前記電力密度以上では、イオン注入
による加熱効果により半導体膜の温度が200℃以上と
なり、結晶相の成長が起きやすい。
If the projected range of the implanted element is smaller than the film thickness, it is not desirable because amorphization will not occur at a depth within the semiconductor film that the ions cannot reach. When the power density is higher than the above, the temperature of the semiconductor film becomes 200° C. or higher due to the heating effect caused by ion implantation, and crystal phase growth tends to occur.

注入するイオンの種類は特に限定されないが結晶化さゼ
る半導体構成元素か基板構成元素か希ガス元素が望まし
い。
The type of ions to be implanted is not particularly limited, but preferably a semiconductor constituent element, a substrate constituent element, or a rare gas element that crystallizes.

イオン注入を半導体膜の表面の一部分におこなう方法と
しては、半導体膜表面に所定の直径の収束イオンビーム
をスボ/l−照射する方法を用いることができる。イオ
ンビームが注入された頌域にある結晶は小さな結晶はな
くなり非晶質化され、比較的大きな結晶はその粒径が小
さくなる。収束イオンビームの加速電圧、直径、イオン
ビームを照射する間隔、時間などの条件は、非晶質半導
体膜に含まれている結晶の大きさ、密度、空間分布など
により、つづく結晶成長工程により大きく、均一な多結
晶膜が得られるように設定される。また、非晶質半導体
膜の上に5j02膜の如き打ち込むイオンに対してマス
キング膜となるものを所定寸法に被覆し、マスキング膜
が被覆されていない非晶質半導体膜の露出部分にイオン
注入をおこなう方法を用いることができる。また前記イ
オン注入をおこなうにあたっては、非晶質半導体膜を加
熱しながらおこなってもよい。
As a method of implanting ions into a portion of the surface of the semiconductor film, a method of irradiating the surface of the semiconductor film with a focused ion beam of a predetermined diameter can be used. The crystals in the hollow region into which the ion beam was implanted lose small crystals and become amorphous, and the grain size of relatively large crystals becomes smaller. Conditions such as the acceleration voltage, diameter, ion beam irradiation interval, and time of the focused ion beam may vary depending on the size, density, and spatial distribution of the crystals contained in the amorphous semiconductor film, and may vary depending on the subsequent crystal growth process. , are set so as to obtain a uniform polycrystalline film. In addition, a masking film such as a 5j02 film to be implanted is coated on the amorphous semiconductor film to a predetermined size, and ions are implanted into the exposed parts of the amorphous semiconductor film that are not covered with the masking film. A method can be used. Further, the ion implantation may be performed while heating the amorphous semiconductor film.

さらに、基板に到達した注入イオンにより光吸収か生じ
た場合、2種類以上のイオンを注入することでこれらを
反応させ(例えば珪素注入により光吸収が発生した場合
は酸素、窒素等をイオノ注入ン、基板内に透明な化合物
(前述の例ではS]o2あるいは5i3Nn)を形成す
ることにより光吸収を抑制することかできる。
Furthermore, if optical absorption occurs due to implanted ions that reach the substrate, two or more types of ions may be implanted to cause these to react (for example, if optical absorption occurs due to silicon implantation, oxygen, nitrogen, etc. are ion-implanted). Light absorption can be suppressed by forming a transparent compound (S]o2 or 5i3Nn in the above example) in the substrate.

[作用コ 本発明によれば、加速されたイオンが半導体膜に打ち込
まれ、エネルギーを失いながら減速する過程で、格子系
に直接的に(入射原子と半導体原子の弾性衝突)あるい
は間接的に(入射原子と半導体電子系との非弾性衝突)
エネルギーを与え、半導体膜を原子レベルで局所的に高
温に加熱する。
[Operations] According to the present invention, accelerated ions are implanted into a semiconductor film, and in the process of decelerating while losing energy, they directly (elastic collision between incident atoms and semiconductor atoms) or indirectly (elastic collision between incident atoms and semiconductor atoms) strike the lattice system. Inelastic collision between incident atoms and semiconductor electron system)
Energy is applied to locally heat the semiconductor film to high temperatures at the atomic level.

このイオンビームによる温度上昇は、時間的にも短く局
所的であることから、平均的な基板の温度上昇はこれと
比較してはるかに小さく、さらにイオン注入により生じ
た欠陥が半導体原子の移動を促進することで、半導体膜
の結晶成長を低い温度で実現する。
The temperature rise caused by this ion beam is short and local, so the average temperature rise of the substrate is much smaller than this, and furthermore, defects caused by ion implantation prevent the movement of semiconductor atoms. By accelerating the crystal growth of the semiconductor film, it is possible to realize crystal growth of the semiconductor film at a low temperature.

また、結晶核の形成や結晶成長において、注入イオンの
投影飛程が半導体膜の膜厚より大きくなるように決定し
た加速エネルギーの設定は、注入原子と半導体膜構成原
子のカスケー)゛衝突による非晶質化の効果を抑え、半
導体膜中で結晶化させた卸域内の欠陥密度を小さくし、
低温で良質の結晶粒が得られるよう作用する。
In addition, during the formation of crystal nuclei and crystal growth, the acceleration energy setting determined so that the projected range of the implanted ions is larger than the thickness of the semiconductor film is important because it prevents collisions caused by cascading between the implanted atoms and the semiconductor film constituent atoms. Suppressing the effect of crystallization and reducing the defect density within the crystallized region in the semiconductor film,
It works to obtain high quality crystal grains at low temperatures.

[実施例] 本発明を以下に実施例に基いて説明する。第1図、第2
図、第3図、第4図は、それぞれ本発明の実施例1. 
2. 3. 4の工程説明図である。第5図、第6図は
実施例1の注入したイオンの濃度分布を示す図であり、
第7図は実施例4の注入したイオンの濃度分布を示す図
である。
[Examples] The present invention will be described below based on Examples. Figures 1 and 2
FIG. 3, and FIG. 4 respectively show Example 1 of the present invention.
2. 3. 4 is a process explanatory diagram. 5 and 6 are diagrams showing the concentration distribution of implanted ions in Example 1,
FIG. 7 is a diagram showing the concentration distribution of implanted ions in Example 4.

実施例1 石英ガラスとアルカリ土類・アルミナボロシリケートガ
ラス(フーニング社製商品名7059ガラス)の2種の
ガラス基板上に、シランガスを原料とするプラズマCV
D法により結晶核を含む非晶質珪素膜を150nmの膜
厚で堆積した(第1図(a))。次に珪素を、加速エネ
ルギー180keV、 ドーズ量5 X I O16個
”’cm2、ビーム電流密度6μA/Cm2で基板加熱
をせずにイオン注入したく第1図(b))。注入珪素の
分布の様子を封算(LSS理論により)した結果を第5
図に示す。ごれら試料を、透過電子顕微鏡観察および透
過電子線回折によりイオン注入の前後で比較した。イオ
ン注入前には50nm程度の結晶核を含む非晶質であっ
た珪素膜が、600nm程度の結晶粒を持つ多結晶珪素
膜に成長している様子が確認できた。イオンビームの電
流密度を変化させたところ、3μA /’ c m 2
以下の1!流密度では結晶粒の成長が極端に低下するこ
とが明かとなった。また、最終的な結晶粒の粒径は結晶
核の密度によって決定され、ドーズ量を増加させても結
晶粒の粒径は増加しなかった。従って、非晶質珪素層の
全域が多結晶に変化したところで結晶成長は終了した。
Example 1 Plasma CV using silane gas as a raw material was applied on two types of glass substrates: quartz glass and alkaline earth/alumina borosilicate glass (trade name 7059 glass manufactured by Hooning).
An amorphous silicon film containing crystal nuclei was deposited to a thickness of 150 nm by method D (FIG. 1(a)). Next, we would like to implant silicon ions without heating the substrate at an acceleration energy of 180 keV, a dose of 5 x IO 16 cm2, and a beam current density of 6 μA/cm2 (Fig. 1(b)). The result of calculating the situation (using LSS theory) is shown in the fifth
As shown in the figure. These samples were compared before and after ion implantation by transmission electron microscopy and transmission electron diffraction. It was confirmed that the silicon film, which was amorphous including crystal grains of about 50 nm before ion implantation, had grown into a polycrystalline silicon film with crystal grains of about 600 nm. When the current density of the ion beam was changed, it was 3 μA /' cm 2
1 below! It has become clear that the growth of grains is extremely reduced when the flow density is increased. Further, the final grain size of the crystal grains was determined by the density of crystal nuclei, and the grain size of the crystal grains did not increase even if the dose amount was increased. Therefore, crystal growth ended when the entire area of the amorphous silicon layer changed to polycrystal.

一方、イオノビームの電流密度を低下させ、2μA/c
m2とし、300℃程度に基板を加熱してイオン注入を
行ったところ、基板加熱を行わない場合と同様の粒径を
持つ多結晶珪素膜かいずれのカラス基板においても得ら
れた。
On the other hand, the current density of the ion beam was reduced to 2 μA/c.
When the substrate was heated to about 300° C. and ions were implanted, a polycrystalline silicon film having the same grain size as in the case where the substrate was not heated was obtained on both glass substrates.

さらに、基板中に注入した珪素を酸化させるために、酸
素を加速エネルギー+10keV、ドズ!1x10+7
個/cm”注入したく第1図C)。
Furthermore, in order to oxidize the silicon implanted into the substrate, oxygen was accelerated with an energy of +10 keV, Dozu! 1x10+7
Figure 1 C).

酸素の注入深さは珪素と一致させ、注入量は珪素の2倍
とした。この条件で計算した酸素の濃度分布を第6図に
示す。口の後、多結晶珪素膜にパターンを形成し、珪素
をエノチノグした部分の光吸収を調べたところ、酸素注
入を行っていない場合と比較して光吸収の顕著な抑制効
果か認められた。
The implantation depth of oxygen was made to match that of silicon, and the implantation amount was twice that of silicon. The oxygen concentration distribution calculated under these conditions is shown in FIG. After forming a pattern on the polycrystalline silicon film and examining the light absorption of the silicon-etched area, it was found that the light absorption was significantly suppressed compared to the case where oxygen was not implanted.

実施例2 実施例1と同じ2種のガラス基板上に、プラズマCVD
法により結晶核を含む非晶質珪素膜を150nmの膜厚
で堆積した。この上に、酸化珪素をスパッタリング法に
より200nm堆積し、酸化膜にフォトリングラフ工程
を通して1辺が500nmの正方形のマスクを3μm毎
に設けた(第2図(a))。次に、珪素を加速エネルギ
ーl00keV、 ドーズ量lXl0”個/cm2、 
ビーム電流密度1μA。・Cm2て基板加熱をしないで
イオン注入し、77りのない部分の非晶質化を行ったく
第2図(b))。この後、酸化珪素膜を除去し、さらに
珪素を加速エネルギー180keV、ドズIt5xl□
+a個/cm2、ビーム電流密度2μA、/ c m 
2、基板加熱300℃の条件でイオン注入したく第2図
(C))。この試料を透過電子顕微鏡観察および透過電
子線回折により評価したところ、いずれのガラス基板に
おいても3μm程度の比較的粒径の揃った多結晶珪素膜
が形成されていることが分かった。
Example 2 Plasma CVD was performed on the same two types of glass substrates as in Example 1.
An amorphous silicon film containing crystal nuclei was deposited to a thickness of 150 nm by the method. On top of this, silicon oxide was deposited to a thickness of 200 nm by a sputtering method, and square masks each having a side of 500 nm were provided every 3 μm on the oxide film through a photophosphorographic process (FIG. 2(a)). Next, the silicon was accelerated with an energy of 100 keV, a dose of 1X10" pieces/cm2,
Beam current density 1μA.・I want to implant ions using Cm2 without heating the substrate and make the part without 77 amorphous amorphous (Fig. 2(b)). After that, the silicon oxide film is removed, and the silicon is further accelerated with an energy of 180 keV and a dose of It5xl□.
+a pieces/cm2, beam current density 2μA,/cm2
2. Ion implantation is performed under the condition of heating the substrate to 300° C. (Figure 2 (C)). When this sample was evaluated by transmission electron microscopy and transmission electron beam diffraction, it was found that a polycrystalline silicon film with a relatively uniform grain size of about 3 μm was formed on each glass substrate.

実施例3 実施例1と同じ2種のガラス基板上に、プラズマCVD
法により非晶質珪素膜を150nmの膜厚で堆積した(
第3図(a))。次に、珪素を加速エネルギー180 
k e V、  ドーズ量3X10”個/cm2、ビー
ム電流密度10μA/cm2、基板加熱なしの条件でイ
オン注入し、結晶相の形成を行った(第3図(b))。
Example 3 Plasma CVD was performed on the same two types of glass substrates as in Example 1.
An amorphous silicon film with a thickness of 150 nm was deposited by the method (
Figure 3(a)). Next, accelerate the silicon with an energy of 180
Ion implantation was performed under the following conditions: k e V, dose: 3×10''/cm 2 , beam current density: 10 μA/cm 2 , and without heating the substrate to form a crystalline phase (FIG. 3(b)).

この後、結晶相の密度を減少させるため、珪素を加速エ
ネルギー18Q k e V、  ドーズjllx+ 
0+s個、/Cm2、 ビーム電流密度:1μA/cm
”、基板加熱200°Cの条件でイオン注入し、粒径が
小さい結晶相を非晶質化した(第3図(C))。さらに
、残った結晶相を成長させ、膜全体を結晶化するため、
珪素を加速エネルギー180keV、ドーズ量5X10
16個、’C1n2、ビーム電流密度2μA/Cm2、
基板加熱300℃の条件でイオノ注入した(第3図(d
))。この試料を透過電子顕微鏡観察および透過電子線
回折により評価したところ、3μm程度の粒径の多結晶
珪素膜が形成されていることが分かった。また、第3図
(C)まで加工した試料に、窒素雰囲気中で600℃5
時間熱処理を加え、同様の評価を行ったところ、3μm
程度の粒径の多結晶珪素膜がいずれの基板にも形成され
ていることが分かった。なお、熱処理による結晶成長は
、レーザーやランプによるものでも可能であった。
After this, in order to reduce the density of the crystal phase, the silicon is accelerated with an energy of 18Q ke V and a dose of jllx+
0+s pieces, /Cm2, Beam current density: 1μA/cm
”, ions were implanted under the conditions of heating the substrate to 200°C, and the crystalline phase with small grain size was made amorphous (Figure 3 (C)).Furthermore, the remaining crystalline phase was grown to crystallize the entire film. In order to
Accelerate silicon with energy 180keV and dose 5X10
16 pieces, 'C1n2, beam current density 2μA/Cm2,
Iono-implantation was carried out under the condition of substrate heating at 300°C (Fig. 3(d)
)). When this sample was evaluated by transmission electron microscopy and transmission electron beam diffraction, it was found that a polycrystalline silicon film with a grain size of about 3 μm was formed. In addition, the sample processed up to Figure 3 (C) was heated to 600°C in a nitrogen atmosphere.
When a similar evaluation was performed with time heat treatment, 3 μm
It was found that a polycrystalline silicon film with a grain size of about 100 mL was formed on each substrate. Note that crystal growth by heat treatment was also possible using a laser or a lamp.

実施例4 単結晶ガリウム砒素基板上に、スパッタ法により非晶質
珪素膜を150nmの膜厚で堆積した(第4図(a))
。次にアルゴンを、加速エネルギー 280 k e 
V、 ドーズ115xl□+a個、、/Crr12、ビ
ーム電流密度2μA、’Cm2、基板加熱250℃の条
件でそれぞれイオン注入したく第4図(b))。注入ア
ルゴンの分布の様子を第7図に示す。これら試料を、透
過電子顕微鏡観察および透過電子線回折によりイオン注
入の前後で比較した。イオン注入前には非晶質であった
珪素膜が、はぼ−様な単結晶珪素膜に成長している様子
が認められた。
Example 4 An amorphous silicon film with a thickness of 150 nm was deposited on a single crystal gallium arsenide substrate by sputtering (Fig. 4(a)).
. Next, add argon to the acceleration energy of 280 k e
Ion implantation was performed under the following conditions: V, dose: 115xl□+a, /Crr: 12, beam current density: 2 μA, 'Cm2, substrate heating: 250° C. (Fig. 4(b)). FIG. 7 shows the distribution of the injected argon. These samples were compared before and after ion implantation by transmission electron microscopy and transmission electron diffraction. It was observed that the silicon film, which was amorphous before ion implantation, had grown into a bubble-like single crystal silicon film.

なお、アルゴン注入によるガリウム砒素基板中の欠陥は
、熱処理により回復か可能であった。
Note that defects in the gallium arsenide substrate caused by argon implantation could be recovered by heat treatment.

[発明の効果] 本発明によれば、従来不可能であった大粒径で、しかも
粒径の揃った多結晶半導体膜の形成あるいはへテロエピ
タキシャル成長を、低温で実現できる。従来の加熱によ
る高温プロセスでは熱による変形や基板構成元素の拡散
等で半導体用とじで使用できなかった基板が、本発明に
より使用できる。
[Effects of the Invention] According to the present invention, the formation or heteroepitaxial growth of a polycrystalline semiconductor film with a large grain size and uniform grain size, which was previously impossible, can be realized at a low temperature. According to the present invention, substrates that could not be used for semiconductor binding due to thermal deformation or diffusion of substrate constituent elements in conventional heating-based high-temperature processes can be used.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、第2図、第3図、第4図は、本発明による多結
晶半導体膜の製造方法を説明するための図である。第5
図、第6図、第7図は、本発明の実施例1〜3て注入し
たイオンの1度分布を説明するための図である。 3結晶相 2ax、*珪素膜 Si”   Si” Si”  Si”11111i1 459八昌j 月な 璽 會 ★ 第 図 Si◆  S1◆  Si÷  Si◆會會l1l S1◆  S1◆  S1◆  S1÷1111 第 図 イ非晶質珪素膜 +liN 甚 1( +++1+++ Sl“ +++++++1 第 図 Ar◆  Ar4−  Ar+  Ar◆+l1itf
l1 8単結晶珪素膜 第 図 第5図 深さ/nm 第6図 第 7 図 手続補正書 平成2年9月29 日
FIG. 1, FIG. 2, FIG. 3, and FIG. 4 are diagrams for explaining a method of manufacturing a polycrystalline semiconductor film according to the present invention. Fifth
6 and 7 are diagrams for explaining the 1 degree distribution of ions implanted in Examples 1 to 3 of the present invention. 3 crystal phase 2ax, *Silicon film Si” Si” Si” Si”11111i1 459 Yashoj Moon Seal★ Fig. Amorphous silicon film +liN 甚1( +++1+++ Sl" +++++++++1 Figure Ar◆ Ar4- Ar+ Ar◆+l1itf
l1 8 Single crystal silicon film Figure 5 Depth/nm Figure 6 Figure 7 Procedure amendment September 29, 1990

Claims (1)

【特許請求の範囲】 1)基板上に結晶を含む非晶質半導体を形成する工程と
、前記形成された非晶質半導体膜の表面から、注入イオ
ンの投影飛程が前記非晶質半導体の膜厚より大きくなる
ようにイオン注入する結晶成長工程とを含む、多結晶半
導体膜を基板上に製造する方法。 2)前記非晶質半導体膜中に含まれる前記結晶の部を、
非晶質化することにより、結晶の密度および/または位
置を調整する制御工程を、前記結晶成長工程に先立ち、
設けることを特徴とする特許請求範囲第1項記載の方法 3)前記制御工程が、前記非晶質半導体膜の表面に収束
イオンビームを間隔をあけて照射してイオンを注入する
ことからなる特許請求範囲第2項記載の方法。 4)前記制御工程が、前記非晶質半導体膜の表面を所定
形状にマスキングし、その後マスキングされない前記非
晶質半導体膜の露出表面から、イオンを注入することか
らなる特許請求範囲第2項記載の方法。 5)前記結晶成長工程が、前記基板が単結晶半導体また
は単結晶絶縁体であり、前記非晶質半導体膜が前記基板
とは組成が異なる、ヘテロエピタキシャル成長工程であ
る特許請求範囲第1項及至第4項のいずれかの項に記載
の方法。
[Scope of Claims] 1) A step of forming an amorphous semiconductor containing crystals on a substrate, and determining that the projected range of implanted ions from the surface of the formed amorphous semiconductor film is A method for manufacturing a polycrystalline semiconductor film on a substrate, including a crystal growth step of implanting ions so that the film becomes larger than the film thickness. 2) The crystal part included in the amorphous semiconductor film,
Prior to the crystal growth step, a control step of adjusting the density and/or position of the crystal by making it amorphous,
3) The method according to claim 1, characterized in that the controlling step comprises implanting ions by irradiating the surface of the amorphous semiconductor film with a focused ion beam at intervals. The method according to claim 2. 4) The controlling step comprises masking the surface of the amorphous semiconductor film into a predetermined shape, and then implanting ions from the exposed surface of the amorphous semiconductor film that is not masked. the method of. 5) The crystal growth step is a heteroepitaxial growth step in which the substrate is a single crystal semiconductor or a single crystal insulator, and the amorphous semiconductor film has a composition different from that of the substrate. The method described in any of Section 4.
JP11657290A 1989-11-14 1990-05-02 Method for manufacturing semiconductor film Expired - Lifetime JP2800060B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP11657290A JP2800060B2 (en) 1989-11-14 1990-05-02 Method for manufacturing semiconductor film
ITMI911181A IT1248789B (en) 1990-05-02 1991-04-30 METHOD FOR THE PRODUCTION OF A POLYCRYSTALLINE SEMICONDUCTOR FILM
DE4114162A DE4114162A1 (en) 1990-05-02 1991-04-30 METHOD FOR PRODUCING A POLYCRYSTALLINE SEMICONDUCTOR FILM
GB9109508A GB2244284B (en) 1990-05-02 1991-05-02 A method of manufacturing a polycrystalline semiconductor film
FR9105415A FR2661779A1 (en) 1990-05-02 1991-05-02 PROCESS FOR PRODUCING A POLYCRYSTALLINE SEMICONDUCTOR FILM.

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP1-295330 1989-11-14
JP29533089 1989-11-14
JP11657290A JP2800060B2 (en) 1989-11-14 1990-05-02 Method for manufacturing semiconductor film

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JPH03250621A true JPH03250621A (en) 1991-11-08
JP2800060B2 JP2800060B2 (en) 1998-09-21

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US9730716B2 (en) 2001-05-18 2017-08-15 United States Endoscopy Group, Inc. Retrieval device
US9826997B2 (en) 2007-06-08 2017-11-28 U.S. Endoscopy Group, Inc. Retrieval device
US10667838B2 (en) 2017-01-09 2020-06-02 United States Endoscopy Group, Inc. Endoscopic snare device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9730716B2 (en) 2001-05-18 2017-08-15 United States Endoscopy Group, Inc. Retrieval device
US7691110B2 (en) 2004-05-25 2010-04-06 U.S. Endoscopy Group, Inc. Snare injection device
US9826997B2 (en) 2007-06-08 2017-11-28 U.S. Endoscopy Group, Inc. Retrieval device
US11166735B2 (en) 2007-06-08 2021-11-09 United States Endoscopy Group, Inc. Retrieval device
US10667838B2 (en) 2017-01-09 2020-06-02 United States Endoscopy Group, Inc. Endoscopic snare device
US10786277B2 (en) 2017-01-09 2020-09-29 United State Endoscopy Group, Inc. Retrieval device

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