JPS6356450U - - Google Patents

Info

Publication number
JPS6356450U
JPS6356450U JP14797186U JP14797186U JPS6356450U JP S6356450 U JPS6356450 U JP S6356450U JP 14797186 U JP14797186 U JP 14797186U JP 14797186 U JP14797186 U JP 14797186U JP S6356450 U JPS6356450 U JP S6356450U
Authority
JP
Japan
Prior art keywords
cpu
cpus
runaway
circuit
printer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14797186U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14797186U priority Critical patent/JPS6356450U/ja
Publication of JPS6356450U publication Critical patent/JPS6356450U/ja
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)
  • Accessory Devices And Overall Control Thereof (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図は第1図に示す各部の信号波形を示す図である
。 図において、1〜3はCPU、10はドライブ
クリア回路、11はCPUリセツト回路をそれぞ
れ示す。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a diagram showing signal waveforms of each part shown in FIG. 1. In the figure, 1 to 3 are CPUs, 10 is a drive clear circuit, and 11 is a CPU reset circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] マイクロプロセツサ(以後CPUと略す)を複
数個使用し、被駆動部材を位置決め制御するプリ
ンタにおけるCPU暴走時保護回路において、C
PUの暴走を互に監視し、暴走信号をそれぞれ出
力する前記複数のCPUと、前記複数のCPUか
ら得られたCPU暴走信号の論理和によりCPU
をリセツトさせる為の信号を出力するドライブク
リア回路と、前記ドライブクリア回路出力信号を
受けCPUをリセツトするリセツト回路とで構成
されたことを特徴とするプリンタのCPU暴走時
の保護回路。
C
The plurality of CPUs mutually monitor the runaway of the CPUs and output runaway signals, and the CPU is determined by the logical sum of the CPU runaway signals obtained from the plurality of CPUs.
1. A protection circuit for a printer when a CPU runs out of control, comprising a drive clear circuit that outputs a signal for resetting the printer, and a reset circuit that receives the drive clear circuit output signal and resets the CPU.
JP14797186U 1986-09-26 1986-09-26 Pending JPS6356450U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14797186U JPS6356450U (en) 1986-09-26 1986-09-26

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14797186U JPS6356450U (en) 1986-09-26 1986-09-26

Publications (1)

Publication Number Publication Date
JPS6356450U true JPS6356450U (en) 1988-04-15

Family

ID=31061815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14797186U Pending JPS6356450U (en) 1986-09-26 1986-09-26

Country Status (1)

Country Link
JP (1) JPS6356450U (en)

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