JPS6355811B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse width conversion circuit, and in particular, samples an analog signal to be converted at a predetermined sampling period, and calculates the amplitude difference from the amplitude of the previous sampling point at each sampling point. The present invention relates to a pulse width conversion circuit that generates a width modulated pulse having a pulse width determined by (hereinafter referred to as a difference).

In such a pulse width conversion circuit, if the sampling frequency is higher than the frequency of the analog signal, the difference approximates the rate of change of the analog signal.
For example, it is used when performing speed feedback in an on/off control system.

Figure 1 is a block diagram showing an example of the configuration of a conventional circuit of this type, where 1 is an analog signal input terminal, 2 is a sampling pulse input terminal, 3 is a pulse width modulation circuit (hereinafter abbreviated as PWM), and 4 is a delay block. circuit, 5
6 is an analog subtraction circuit, 6 is an absolute value circuit, and 7 is an output terminal. FIG. 2 is a waveform diagram showing the operation of the circuit in FIG. 1, where a is the signal waveform of terminal 1, b is the signal waveform of terminal 2, c is the output waveform of PWM 3, and d is the output waveform of subtraction circuit 5. be.

Since the operation of PWM3 is well known, its explanation will be omitted. Delay circuit 4 provides a delay of one sampling period. Therefore, the output of the subtraction circuit 5 becomes a pulse having a width proportional to the signal difference, as shown in FIG. 2d, and its polarity is determined by the sign of the signal difference. If this output is made to have a single polarity by the absolute value circuit 6, a width-converted pulse train is obtained at the terminal 7.

Since the conventional circuit is configured as described above, if the relationship between the signal difference and the pulse width is to be made nonlinear, a special conversion circuit must be added.

For example, in a thermal recorder, it is necessary to control the power supplied to the thermal pen in order to obtain a constant trace density regardless of the displacement speed of the thermal pen. When such control is performed using on/off control, it is desirable that the relationship between the signal difference that approximates the speed of the displacement signal and the pulse width be nonlinear, but if the conventional circuit is used, a nonlinear relationship cannot be achieved. The drawback was that I couldn't do it.

The present invention was made in order to eliminate the above-mentioned drawbacks in conventional circuits, and it is an object of the present invention to provide a pulse width conversion circuit that has a simpler configuration than conventional circuits and can provide desired nonlinear characteristics. The purpose is

Embodiments of the present invention will be described below with reference to the drawings. FIG. 3 is a block diagram showing an embodiment of the present invention, in which the same symbols as in FIG. 1 indicate the same parts, 8 is an analog subtraction circuit, 9 is an integrator, 10 is a comparator, 1
1 is a control circuit, the difference between the analog signal to be converted and the output of the integrator 9 is output from the subtraction circuit 8 and binarized by the comparison 10 (in this case, the difference between the input signal x and the output signal The relationship with y is set as y=+1 when x≧0 and y=−1 when x<0).
The output of the comparator 10 is sent to the integrator 9 as explained later.
Since it is applied to the signal, it is called the signal to be integrated.
The control circuit 11 inputs the sampling pulse from the terminal 2 (the sampling pulse may be generated within the control circuit 11), and the output of the comparator 10 is input from the start point of each sampling period until the inversion point when the output of the comparator 10 is inverted. is input to the integrator 9, and a voltage of 0 (zero) is input to the integrator 9 from the point of inversion to the end point of the sampling period. The output of the integrator 9 is kept constant while the input is 0. Alternatively, the control circuit 11 may control the output of the post-integrator 9 to be kept constant from the above-mentioned inversion point using another control method.

Figure 4 is a waveform diagram showing the operation of the circuit in Figure 3.
The curve a shows the signal waveform of the terminal 1, the curve b shows the signal waveform of the terminal 2, the broken line a shows the output voltage of the integrator 9, and the curve c shows the output voltage of the terminal 7. For example, at time t ₁ , the output of comparator 10 is +1, and integrator 9 integrates this +1 input. At time t ₂ , the output of comparator 10 reverses the polarity, so between t ₂ and t ₃ , the integrator The input of integrator 9 is kept at 0, and at time _t3 , the input of integrator 9 becomes +1 again. For example, at time _t4 , the input of the integrator 9 becomes -1. In this way, the output of the integrator 9 follows the analog signal from the terminal 1, and the time during which the output of the comparator 10 is input to the integrator 9 (for example, t ₁ - t ₂ in FIG. 4) is the difference is proportional to. It is easy to output from the terminal 7 a pulse train (FIG. 4c) having a pulse width proportional to this difference, and this is the desired output.

FIG. 5 is a block diagram showing another embodiment of the present invention, in which the same reference numerals as in FIG. 3 indicate the same or corresponding parts, and 20 is a comparator having multiple stages of output levels. FIG. 6 is a characteristic diagram showing an example of the characteristics of the comparator 20, in which the output y for the input x is +2, +1, -
There are four stages: 1 and -2. The operations of the other circuits in FIG. 5 are similar to those of the circuits with the same symbols in FIG. 3, except that the output y of the comparator 10 in FIG. Duplicate explanations will be omitted. At a time point such as t ₁ shown in FIG. 4, the subtraction circuit 8
Since the output of is relatively large, the comparator 20 outputs +2, which is input to the integrator 9, and the output of the integrator 9 rises faster than the diagonal line shown in FIG. The output of comparator 20 decreases.
outputs +1, and the output of the integrator 9 rises with the same slope as shown in FIG. 4, reaching the polarity reversal point of the output of the subtraction circuit 8. Therefore, where the difference is large, the pulse width is compressed, and where the difference is small, the pulse width is expanded and converted into a pulse width, making it possible to easily realize a nonlinear relationship.

FIG. 7 is a block diagram showing still another embodiment of the present invention, in which the same reference numerals as in FIG. 3 indicate the same or corresponding parts, and 30 inputs a rectangular wave having a predetermined amplitude and converts it into another waveform. It is a waveform converter.
An example of the output waveform of the waveform converter is g(t)=t・f, where t is the time from the starting point of the sampling period and f(t) is a rectangular wave input with a predetermined amplitude.
(t). However, g(t) is the waveform converter 3
With an output of 0, (t) is less than or equal to the sampling period. The output of the comparator 10 in FIG. 3 was the signal to be integrated, whereas in FIG. 7 the output of the waveform converter 30 is the signal to be integrated. The operations of the other circuits except for the operation of 30 are the same as those of the circuits with the same reference numerals in FIG. 3, so a redundant explanation will be omitted.

Figure 8 is a waveform diagram showing the operation of the circuit in Figure 7.
The curve a is the signal waveform of terminal 2, and the curve b is the signal waveform of terminal 1.
The signal waveform of b is the output voltage of the integrator ⁹ , and c is the waveform converter 30.
, d is the output signal waveform of the waveform converter 30, and e is the output voltage of the terminal 7.

Since a signal like d in FIG. 8 is the signal to be integrated, the output of the integrator 9 is as shown in FIG. 8b.
rise or fall along a curve in the form of t ² . Therefore, compared to the case of FIG. 4 in which the signal to be integrated is a rectangular wave with a constant amplitude, the pulse width of the signal at the output terminal 7 is expanded where the difference is small, and compressed where the difference is large. Nonlinear pulse width conversion can be realized.

In addition to the embodiments described above, various modified designs are possible for the control of the integrator by the control circuit and the design of the waveform converter, and desired nonlinear conversion can be realized.

As described above, according to the present invention, a pulse width conversion circuit that can realize desired nonlinear conversion with a simple circuit can be obtained.

[Brief explanation of drawings]

Figure 1 is a block diagram showing an example of the configuration of a conventional circuit, Figure 2 is a waveform diagram showing the operation of the circuit in Figure 1,
FIG. 3 is a block diagram showing an embodiment of this invention.
Figure 4 is a waveform diagram showing the operation of the circuit in Figure 3;
6 is a block diagram showing another embodiment of the present invention, FIG. 6 is a characteristic diagram showing the characteristics of the comparator shown in FIG. 5, and FIG.
The figure is a block diagram showing still another embodiment of the invention, and FIG. 8 is a waveform diagram showing the operation of the circuit of FIG. 7. 8...Analog subtraction circuit, 9...Integrator, 1
0, 20... Comparator, 11... Control circuit, 30...
...Waveform converter. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. An analog subtraction circuit that subtracts the output of an integrator from an analog signal to be converted, and a signal to be integrated determined by the output of the analog subtraction circuit that is input at a predetermined sampling period. The signal to be integrated is input to the integrator from the start point of the sampling period until the inversion point at which the signal to be integrated reverses the polarity, and the output of the integrator is input from the point of inversion to the end point of the sampling period. A pulse width conversion circuit that is equipped with a control circuit that maintains a constant pulse width. 2. The pulse width conversion circuit according to claim 1, wherein the signal to be integrated is formed by making the polarity of a rectangular wave having a predetermined amplitude the same as the polarity of the output of the analog subtraction circuit. 3. The signal to be integrated changes its amplitude in accordance with the amplitude of the output of the analog subtraction circuit, and is formed with the same polarity as the output of the analog subtraction circuit. The pulse width conversion circuit according to item 1. 4. Claim 1, characterized in that the signal to be integrated changes its amplitude in accordance with the time from the starting point of the sampling period, and is formed with the same polarity as the output of the analog subtraction circuit. The pulse width conversion circuit described in Section 1.