JPS6355639A - Data processor - Google Patents

Abstract

PURPOSE:To easily perform the processing in case a branch estimating job fails by attaining the replacement process between the displacement up to a branching destination instruction and the length of a conditional branch instruction based on the branch estimating result of the conditional branch instruction that is processed by a 1st mechanism. CONSTITUTION:If it is known that the instruction decoded by a fetch decoding mechanism 1 is equal to a conditional branch instruction, a condition inverting mechanism 4 inverts the branch conditions of said instruction as long as it is decided that a branch occurs based on an estimating mechanism 3. Then the branch displacement of the conditional branch instruction is replaced with the instruction length by a replacement mechanism 5. The next instruction is fetched by the mechanism 1 and decoded through a branch jumping address.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a data processing device, and particularly to a data processing bag having a pipeline mechanism.

[Prior Art] Figure 2 shows a conventional pipeline. FIG. 4 is a diagram illustrating a mechanism for processing conditional branch instructions in a data processing module having a data processing module having a data processing module of FIG. First, the configuration of a conventional data processing device will be explained with reference to FIG.

The data processing device includes a fetch decode ti ill 1 that fetches and decodes instructions, an execution mechanism 2 that executes the instructions, and an execution mechanism 2 that fetches and decodes the article 1 cow branch ω instructions fetched and decoded by the fetch decode national structure 1. Branch prediction 3 that predicts whether or not it will be executed and cause a branch! llIn tM 3, a comparison mechanism 6 that compares the prediction result with the execution result to determine whether the prediction was successful, and if it turns out that the prediction of the branch has failed, the instruction in the correct direction is sent to v1. From the fetch decode i Gl 7 which performs the 7 etching and decoding process for the structure 1;

Next, the operation will be explained. fetch decode q:j
Conditional branch instruction is fetched by 1.

Once decoded, the branch pre-preparation module 1111 predicts whether or not the branch will occur. The instruction located next to the above conditional branch instruction is decoded by the fetch decoder (7 etches in bay 1).

The conditional branch instruction is executed in execution block 2, comparison 4 horizontal 6
The actual result and the predicted result are compared by 9!2 using
Fetch and re-decode to tra 1 by Etch Decode.

[Problems to be Solved by the Invention] Since the conventional data processing device is configured as described above, the branch prediction of the conditional branch instruction is
43, but in case the branch does not actually occur, a special ring groove is required to manage the address of the next instruction to be executed, and the device becomes small. There was a turning point during that time.

Therefore, a main object of the present invention is to provide a data processing device that can more easily handle cases where branch prediction fails.

[Means for Solving the Problems] The present invention is a data processing device that processes instructions based on the principle of vibeline processing by a first dawn structure and a second t3 structure included in the instruction processing means, The branch prediction means predicts whether or not a conditional branch instruction processed laterally will cause a branch, and based on the prediction result, determines the displacement to the branch destination instruction indicated by one conditional branch instruction and the conditional branch. The instruction length of the instruction is exchanged by a displacement exchanging means.

[Operation] The data processing device according to the present invention predicts whether or not a branch will occur when a conditional branch instruction is fetched and decoded, and when it is determined that a branch will occur, the conditional branch instruction is Inverts the branch condition of the branch instruction, sets the branch displacement of the conditional branch instruction and the instruction length of the conditional branch instruction, moves it to the execution stage, and at the same time fetches and decodes the next instruction from the jump destination address of the branch. This is what I did.

A real example of an invention] FIG. 1 is a schematic block diagram of an embodiment of the present invention.

First, the configuration of a practical example of the present invention will be described with reference to FIG. In FIG. 1, the data processing system of the present invention includes a fetch decode 4 slot 1 for fetching and decoding an instruction, an execution stage 1 processing 2 for executing the instruction, and a conditional branch instruction to determine whether a branch actually occurs. Branch prediction Nada (蒲3) that predicts whether or not it is true, Conditional anti-inui practice (4) that inverts the branch condition of a conditional branch instruction, and Replacement note that swaps the branch displacement of a conditional branch instruction and the instruction length of a conditional branch instruction! +a 5 and (S are formed.

Next, I will explain the operation. Fetch decode 1 structure 1 decodes the instruction 7 times, and if it turns out to be a conditional branch instruction, branch prediction [
13, and if it is determined that the branch will occur, the branch condition of the 1-conditional branch instruction is inverted using conditional inversion 1 and 4. In other words, for example, if 2 flags are set, branch.
The condition is reversed so that if the Z flag is not set, the branch is executed, and the branch displacement of the conditional branch instruction and the instruction length of the conditional branch instruction are swapped using the swapping mechanism 5, and the next branch is executed from the jump destination address of the branch. Fetch the instruction into one fetch decode structure.

decode. It was determined that a branch would occur according to branch prediction Akebono 3, but as a result, the pre-ml was 110m.
In this case, an instruction with the instruction length of the conditional branch instruction is executed as a branch displacement, so a branch of the instruction located next to the conditional branch instruction in the program occurs, and it is as if the fetch decode i * i , it is the same as if the branch had not occurred due to the decoded conditional branch instruction.

Note that when a branch is predicted to occur, instead of reversing the branch condition of the conditional branch instruction, the execution sequence in Execution 1 and 2 is changed to cause a branch if the branch condition is not satisfied ( Normally, if the branch condition is not satisfied, a branch is not caused).

[Effects of the Invention] As described above, according to the present invention, when a branch is predicted to occur due to a conditional branch instruction, the branch condition of the conditional branch instruction is reversed, and the branch displacement and instruction length are exchanged, If the branch prediction is incorrect by moving to the execution stage, the branch of the instruction located next to the conditional branch instruction in the program will eventually occur. In this way, processing for cases where branch predictions are incorrect requires only a mechanism for exchanging branch conditions, a mechanism for exchanging branch displacements and instruction lengths, and is it possible to do this just like in the past? ! No complicated mechanism is required, and therefore a data processing device can be more easily realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a data processing device as an example of the present invention. FIG. 2 is a schematic block diagram of a conventional data processing device. In the figure, 1 indicates a gap between fetch and decodes, 2 indicates an execution low value, 3 indicates a branch prediction mechanism, 4 indicates a condition reversal mechanism, and 5 indicates a replacement 1 type.

Claims (2)

[Claims] (1) An instruction processing means including a first mechanism and a second mechanism, wherein the first mechanism and the second mechanism process instructions based on the principle of pipeline processing, and the first mechanism processes instructions. branch prediction means for predicting whether or not a conditional branch instruction to be executed causes a branch; and a branch prediction means for predicting whether or not a conditional branch instruction to be executed causes a branch; 1. A data processing device, comprising: displacement exchanging means for exchanging the instruction length. (2) The data processing device according to claim 1, further comprising branch condition changing means for changing the branch condition of the conditional branch instruction based on the prediction result of the branch prediction means.