JPS6355191A - Production of compound semiconductor crystal - Google Patents

Production of compound semiconductor crystal

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Publication number
JPS6355191A
JPS6355191A JP19760786A JP19760786A JPS6355191A JP S6355191 A JPS6355191 A JP S6355191A JP 19760786 A JP19760786 A JP 19760786A JP 19760786 A JP19760786 A JP 19760786A JP S6355191 A JPS6355191 A JP S6355191A
Authority
JP
Japan
Prior art keywords
crystal
substrate
growth
compound semiconductor
constituent elements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP19760786A
Other languages
Japanese (ja)
Other versions
JPH0582358B2 (en
Inventor
Akira Usui
彰 碓井
Hisatsune Watanabe
渡辺 久恒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP19760786A priority Critical patent/JPS6355191A/en
Publication of JPS6355191A publication Critical patent/JPS6355191A/en
Publication of JPH0582358B2 publication Critical patent/JPH0582358B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To form a grown layer of molecular array of a desired crystal along a step of a substrate, by alternately arranging constituent elements in the same plane of a substrate having a step and successively supplying a gas containing the constituent elements under a proper pressure. CONSTITUTION:A step 11 of a compound semiconductor having alternately arranged atoms A and B is formed on a surface of a substrate crystal 13. The step 11 is composed of the atom B. A gas containing the chloride, etc., of the element A is supplied to the substrate crystal 13. In the above process, the temperature of the substrate 13 and the pressure, etc., of the supplied gas are adjusted to an optimum condition to effect the adsorption of the gas of the element A molecule of the supplied gas diffuses on the surface of the substrate 13 and is adsorbed to a part of the step 11. Thereafter, the atmosphere is changed to the element B or its gaseous compound and the element is taken in the position adjacent to the A-Cl adsorbed by the former operation. A row of the compound AB is grown along then step 11 by this process.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、分子列単位、あるいは−分子の単位の精度で
成長の制御を行なう化合物半導体結晶の形成方法に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for forming compound semiconductor crystals in which growth is controlled with precision in units of molecular rows or -molecules.

(従来技術とその問題点) 従来のGaAs等の化合物半導体の薄膜形成技術として
は、構成元素の塩化物、水素化物、有機金属化合物等の
ガス状原料を用いる気相エピタキシャル法(VPE法)
、また、高真空中で構成元素をビーム化し、基板結晶上
に照射して成長を行なう分子線エピタキシャル法(MB
E法)が盛んに用いられている。ところで、これらの成
長法では、薄膜形成のためには成長速度の精密制御が必
要である。しかし、そのため流量、圧力、時間といった
要因を精密に制御しなければならず、単分子層(数人程
度)程度の厚さになると制御は極めて困難であった。
(Prior art and its problems) Conventional techniques for forming thin films of compound semiconductors such as GaAs include the vapor phase epitaxial method (VPE method), which uses gaseous raw materials such as constituent elements such as chlorides, hydrides, and organometallic compounds.
In addition, the molecular beam epitaxial method (MB), in which the constituent elements are made into a beam in a high vacuum and irradiated onto the substrate crystal, is used for growth.
E method) is widely used. By the way, these growth methods require precise control of the growth rate in order to form a thin film. However, this requires precise control of factors such as flow rate, pressure, and time, and control is extremely difficult when the thickness reaches the level of a monomolecular layer (about a few people).

従ってこのような技術では本発明が解決しようとしてい
る問題点、すなわち原子・分子列成長、更に一原子・分
子単位の成長の制御などは不可能に近い。
Therefore, with such a technique, it is nearly impossible to control the problems that the present invention aims to solve, namely, the growth of atomic/molecular arrays, and furthermore, the growth of individual atoms/molecules.

もう一つの成長手法として、化合物半導体の構成元素、
あるいは、その元素を含むガスを交互に供給して一原子
・分子層づつ吸着させ全体として所望の化合物半導体を
成長させようとする原子層エピタキシャル法(ALE法
)がある[ツオモ・スントラ(T。
As another growth method, constituent elements of compound semiconductors,
Alternatively, there is the atomic layer epitaxial method (ALE method), which attempts to grow a desired compound semiconductor as a whole by alternately supplying a gas containing the element and adsorbing it one atomic or molecular layer at a time [Tuomo Suntra (T.

5untola)、第16回国体素子・材料フンファレ
ンス(Extended Abstnact of t
he 16th Conference on 5ol
idState  Device  and  Mat
erials)、Kobe、1984.pp、647−
6501゜この方法によると、膜厚の制御のためには、
従来の成長速度を制御する方法とは異なり、例えばGa
C1とAsH3によるGaAsALE法では、広い温度
、流量範囲においてGaC1吸着回数のみを制御するこ
とによって分子層単位の制御が出来ることが判明してお
り、[ili井(A、 Usui)他、ジャパニーズ・
ジャーナル・オブ・アブライドフイジクス(Japan
eseJournal of Applied Phy
sics)、 Vol、25. No、3. Marc
h。
5untola), 16th National Elements and Materials Conference (Extended Abstnact of t
he 16th Conference on 5ol
idState Device and Mat
Kobe, 1984. pp, 647-
6501゜According to this method, in order to control the film thickness,
Unlike traditional growth rate control methods, e.g.
In the GaAsALE method using C1 and AsH3, it has been found that control in molecular layer units is possible by controlling only the number of GaC1 adsorptions over a wide temperature and flow range;
Journal of Ablide Physics (Japan)
eseJournal of Applied Phys.
sics), Vol, 25. No, 3. Marc
h.

1986、pp、L212−L214]膜厚の制御技術
は格段に向上したものとなっている。
1986, pp. L212-L214] Film thickness control technology has been significantly improved.

ところが、従来のALE法は前述のように単に基板表面
に一様に単原子・分子の層を吸着させて成長する方法で
あり原子列・分子列単位更には一原子・−分子単位で成
長を制御することはできなかった。
However, as mentioned above, the conventional ALE method is a method of simply adsorbing and growing a layer of single atoms/molecules uniformly on the substrate surface, and growth is performed in units of atomic rows, molecular rows, or even single atoms/molecules. I couldn't control it.

もちろん従来のVPE法やMBE法のような構成元素を
同時に供給する方法でも極めて困難であった。
Of course, conventional methods such as the VPE method and the MBE method for simultaneously supplying the constituent elements are also extremely difficult.

本発明の目的は上記従来技術のかかる欠点を除去し、原
子0分子列単位、更には一原子・−分子単位で成長を制
御しうる事の出来る化合物半導体結晶の形成方法を提供
しようとするものである。
An object of the present invention is to eliminate the drawbacks of the above-mentioned conventional techniques and to provide a method for forming compound semiconductor crystals that can control growth in units of 0 atomic and molecule rows, and furthermore, in units of 1 atom and molecule. It is.

(間組点を解決するための手段) すなわち、本発明によれば化合物半導体の構成元素ある
いはその元素を含むガスを交互に基板結晶上へ供給して
結晶成長を行なう方法において、結晶の同一面内に構成
元素が交互に配列され、かつ表面に結晶学的ステップを
有する結晶を基板とし、成長時には少なくとも一方の化
合物半導体の構成元素あるいはその元素を含むガスが前
記ステップのみに吸着しうる最適の基板温度、供給ガス
圧力などの吸着条件に設定しステップに沿ッて一列の吸
着層を形成した後、他の構成元素を供給し、分子列成長
層を得ることを特徴とする化合物半導体結晶の形成方法
がえられる。
(Means for solving interlocking points) That is, according to the present invention, in a method of performing crystal growth by alternately supplying constituent elements of a compound semiconductor or a gas containing the elements onto a substrate crystal, The substrate is a crystal in which the constituent elements are arranged alternately and has crystallographic steps on the surface, and the optimum substrate is such that during growth, the constituent elements of at least one of the compound semiconductors or the gas containing that element can be adsorbed only to the steps. Formation of compound semiconductor crystals characterized by setting adsorption conditions such as temperature and supply gas pressure to form a line of adsorption layer along the steps, and then supplying other constituent elements to obtain a layer of molecular line growth. You can find a method.

更に本発明によれば化合物半導体の構成元素あるいはそ
の元素を含むガスを交互に基板結晶上へ供給して結晶成
長を行なう方法において、結晶の同一面内に構成元素が
交互に配列され、かつ表面で垂直、に交れるステップが
存在する結晶を基板とし、成長時には少なくとも一方の
化合物半導体の構成元素あるいはその元素を含むガスが
前記ステップの交点のみに吸着しうる最適の基板温度、
供給ガス圧力などの吸着条件に設定し前記交点に吸着さ
せた後他の構成元素を供給することにより、所望の結晶
を成長せしめることを特徴とする化合物半導体結晶の形
成方法が得られる。
Furthermore, according to the present invention, in a method of growing a crystal by alternately supplying constituent elements of a compound semiconductor or a gas containing the elements onto a substrate crystal, the constituent elements are arranged alternately within the same plane of the crystal, and The optimum substrate temperature is such that when growing, at least one constituent element of the compound semiconductor or a gas containing the element can be adsorbed only at the intersection of the steps;
A method for forming a compound semiconductor crystal is obtained, which is characterized in that a desired crystal is grown by setting adsorption conditions such as supply gas pressure and adsorbing the element at the intersection point and then supplying other constituent elements.

(作用) 本発明は、化合物半導体の構成元素あるいはその元素を
含むガスを交互に基板結晶上に供給して結晶成長を行な
うものであるが、その際、構成元素が同一平面内に存在
する結晶を基板として選択する。更に、基板表面上に基
板結晶を低指数面から若干傾けて切り出すこと等によっ
てステップを形成する。第1図(a)には原子AとBか
ら成る化合物半導体の1つのステップ11を有する基板
結晶13の斜視概略図を示した。この図ではステップ1
1はB原子によって成り立っている。この基板結晶13
上に例えばAの塩化物を供給すると、表面上に吸着する
(第1図(b))。この時の吸着熱を第2図に示した。
(Function) The present invention grows crystals by alternately supplying constituent elements of a compound semiconductor or gases containing the elements onto a substrate crystal. Select as the substrate. Further, steps are formed on the surface of the substrate by cutting out the substrate crystal slightly inclined from the low index plane. FIG. 1(a) shows a schematic perspective view of a substrate crystal 13 having one step 11 of a compound semiconductor composed of atoms A and B. In FIG. In this diagram, step 1
1 is made up of B atoms. This substrate crystal 13
For example, when a chloride of A is supplied onto the surface, it is adsorbed onto the surface (FIG. 1(b)). The heat of adsorption at this time is shown in Figure 2.

第2図で91は平面上に吸着する場合の吸着熱である。In FIG. 2, 91 is the heat of adsorption when adsorbing on a flat surface.

基板結晶13の温度がある程度高ければ吸着分子は表面
上を拡散し、更に安定な点、第1図ではステップ11の
部分に相当するが、その点に吸着する。その点での吸着
熱をq2とすると、q2>qlなる関係が成り立つ。ま
た、一部は表面を離脱する。
If the temperature of the substrate crystal 13 is high to a certain extent, the adsorbed molecules will diffuse on the surface and will be adsorbed at a more stable point, which corresponds to step 11 in FIG. If the heat of adsorption at that point is q2, then the relationship q2>ql holds true. Also, some of it leaves the surface.

一方、吸着平衡総数には一般にK = aexp(q/
RT)と表わすことができる。ここでαは定数、qは吸
着熱、Rは気体定数、Tはその糸の温度を表わす。
On the other hand, the total number of adsorption equilibria is generally expressed as K = aexp(q/
RT). Here, α is a constant, q is the heat of adsorption, R is a gas constant, and T is the temperature of the thread.

従って第2図においてRTが91より大きく、q2がR
Tに比較して十分大きな値を有しくql<RT<q2)
、またA−C1の分圧を適当に選ぷ゛ことによって平面
上における吸着量をほぼ0とし、ステップに沿った面に
のみ吸着させることが可能である。その後雰囲気をA−
C1からB元素あるいはそのガス状化合物に変換する。
Therefore, in FIG. 2, RT is greater than 91 and q2 is R.
has a sufficiently large value compared to T (ql<RT<q2)
, and by appropriately selecting the partial pressure of A-C1, it is possible to make the amount of adsorption on a flat surface almost 0, and to make it adsorb only on the surface along the steps. After that, the atmosphere was changed to A-
Converts C1 to element B or its gaseous compound.

その結果Bは吸着したA−CIの隣の位置に取り込まれ
、化合物ABがステップに冶って一列だけ成長すること
になる(第1図(C))。
As a result, B is taken into the position next to the adsorbed A-CI, and the compound AB grows in a single line as a step (FIG. 1(C)).

第3図(a)には元素AとBから成ると化合物半導体で
、表面で垂直に交わるステップを有する基板結晶の概略
図を示した。この図では、ステップの交点はB原子によ
って囲まれている。この基板結晶上に例えばAの塩化物
を供給すると表面上に吸着する(第3図(b))。この
時の吸着熱を第4図に示した。グラブで93は平面上に
吸着する場合の吸着熱である。また、q4は第1図と同
じようなステップに吸着する場合の吸着熱、q5はステ
ップの交点における吸着の吸着熱である。前記列吸着と
同じように、RTがq3+q4より大きく、q5がRT
に比較して十分な大きな値を有しくq3.q4<RT<
q5)、また、A−C1の分圧を適当に選ぶことによっ
て平面上やステップにおける吸着量をほぼOとし、ステ
ップの交点のみに吸着させることが可能である。その後
雰囲気をA−CIからB元素あるいはそのガス状化合物
に変換する。その結果Bは吸着したA−CIの隣の位置
に取り込まれ、第3図(c)のようにステップの交点に
化合物ABが成長することになる。次に、本発明を実施
例に基づき具体的に説明する。
FIG. 3(a) shows a schematic diagram of a substrate crystal, which is a compound semiconductor composed of elements A and B, and has steps that intersect perpendicularly on the surface. In this figure, the intersection of the steps is surrounded by B atoms. When a chloride of A, for example, is supplied onto this substrate crystal, it is adsorbed onto the surface (FIG. 3(b)). The heat of adsorption at this time is shown in Figure 4. 93 in Grab is the heat of adsorption when adsorbing on a flat surface. Further, q4 is the heat of adsorption when adsorbing at a step similar to that shown in FIG. 1, and q5 is the heat of adsorption at the intersection of the steps. As with the column adsorption, RT is greater than q3+q4 and q5 is RT
has a sufficiently large value compared to q3. q4<RT<
q5) Furthermore, by appropriately selecting the partial pressure of A-C1, it is possible to make the amount of adsorption on a plane or in a step approximately O, and to cause adsorption only at the intersection of the steps. Thereafter, the atmosphere is changed from A-CI to element B or its gaseous compound. As a result, B is taken into the position next to the adsorbed A-CI, and compound AB grows at the intersection of the steps as shown in FIG. 3(c). Next, the present invention will be specifically explained based on examples.

(実施例) 実施例1 本実施例ではステップを有するGaAs(110)基板
上のInAsの分子側成長に本発明による方法を適用し
た場合について述べる。成長装置の概略を第5図に示し
た。この成長装置では上段の成長室1の上流にInソー
スポート2を置き、その上流からH2キャリアガスと共
にHCIガスを供給する。この結果In、C1が生成さ
れ下流に運ばれる。一方、下段成長室3にはAsの水素
化物であるAsH3をH2キャリアガスと共に供給する
。このガスは反応管中で分解し基板領域では主としてA
s4となっている。基板結晶4としてはGaAs(11
0)面から(100)方向へ数〜数十度傾けて切り出し
た面を用いた。反応管の温度は抵抗加熱炉によりInソ
ース部は800°C1基板結晶部は300〜750°C
とした。ガス流量条件は次の通りである。
(Examples) Example 1 In this example, a case will be described in which the method according to the present invention is applied to the molecular side growth of InAs on a GaAs (110) substrate having steps. A schematic diagram of the growth apparatus is shown in FIG. In this growth apparatus, an In source port 2 is placed upstream of the upper growth chamber 1, and HCI gas is supplied together with H2 carrier gas from the upstream side. As a result, In and C1 are generated and transported downstream. On the other hand, AsH3, which is a hydride of As, is supplied to the lower growth chamber 3 together with H2 carrier gas. This gas decomposes in the reaction tube, and in the substrate region it is mainly A.
It is s4. The substrate crystal 4 is GaAs (11
A surface cut out at an angle of several to several tens of degrees from the 0) surface in the (100) direction was used. The temperature of the reaction tube is set to 800°C for the In source part and 300 to 750°C for the substrate crystal part using a resistance heating furnace.
And so. The gas flow conditions are as follows.

ガスの種類     流量 MCI(In)        5cc/m1nAsH
35cc/m1n H2(各成長室)     5000cc/min成長
に際しては、基板結晶4を先ず下段成長室3に置き、A
s雰囲気で成長温度まで昇温した。成長温度に達した所
で上段成長室1にHCIを供給し、−定時間後HCIの
流れが定常状態になったあと基板結晶4を上段成長室1
に移動した。そこで一定時間InC1を十分に吸着させ
、再び基板結晶4下段成長室3に移動した。1回のIn
C1とAsの吸着を1サイクルとして、これを繰り返す
ことによって層を形成シだ。なお、基板結晶4移動の際
には、移動中の成長を防ぐためにAsH3の供給を停止
し、InCl雰囲気で移動するようにした。
Gas type Flow rate MCI (In) 5cc/m1nAsH
35cc/m1n H2 (each growth chamber) When growing at 5000cc/min, first place the substrate crystal 4 in the lower growth chamber 3, and
The temperature was raised to the growth temperature in a s atmosphere. When the growth temperature is reached, HCI is supplied to the upper growth chamber 1, and after a certain period of time, when the flow of HCI reaches a steady state, the substrate crystal 4 is transferred to the upper growth chamber 1.
Moved to. Then, InC1 was sufficiently adsorbed for a certain period of time, and then the substrate crystal 4 was moved to the lower stage growth chamber 3 again. 1 In
A layer is formed by repeating the adsorption of C1 and As as one cycle. Note that when the substrate crystal 4 was moved, the supply of AsH3 was stopped to prevent growth during the movement, and the movement was performed in an InCl atmosphere.

第6図は、成長温度に対する1サイクル当りの成長層の
厚み(1)の変化を模式的に示したものである。成長温
度が低い時には、tは一定であり、GaAs(110)
面に対する一分子層の厚みにほぼ一致する。しかし、成
長温度が高くなるにっれtは小さくなり、T1〜T2(
T1:550°C,T2:600°C)の範囲で再び一
定値を取り、その後tは減少傾向となる。第6図には(
110)面からの傾きθが5°の場合と10°の場合を
示しであるが、10’の時のtは5°の時の値に比べ約
2倍となることが示されている。またθ=5°の時には
第1図(a)に示すように平面方向に10原子分で1原
子分の高さのステップが生じ、1サイクル当り約0.1
分子層の成長となり、ステップに沿ってのみ成長が生じ
ている場合の成長パターンとなることが判がる。
FIG. 6 schematically shows the change in the thickness (1) of the grown layer per cycle with respect to the growth temperature. When the growth temperature is low, t is constant and GaAs(110)
Approximately corresponds to the thickness of one monolayer on the surface. However, as the growth temperature increases, t becomes smaller, and T1 to T2 (
T1: 550°C, T2: 600°C) takes a constant value again, and thereafter t tends to decrease. Figure 6 shows (
110) Cases where the inclination θ from the plane is 5° and 10° are shown, and it is shown that t when the inclination θ from the plane is 10′ is about twice the value when it is 5°. Furthermore, when θ=5°, as shown in Figure 1(a), a step with a height of 1 atom occurs every 10 atoms in the plane direction, and approximately 0.1 steps per cycle occur.
It can be seen that the growth pattern is that of a molecular layer, and growth occurs only along steps.

実施例2 本実施例表面で垂直に交わるステップを有するGaAS
(110)基板上のInAsの成長に本発明による方法
を適用した場合について述べる。基板結晶としてはGa
As(110)面を基準として、2つの互いに垂直なス
テップが生じるように(111)方向に数度傾けて切り
出しなウェハを用いた。成長装置や他の成長条件は実施
例1と全く同じである。
Example 2 GaAS with vertically intersecting steps on the surface of this example
A case will be described in which the method of the present invention is applied to the growth of InAs on a (110) substrate. Ga as the substrate crystal
Using the As (110) plane as a reference, a wafer was used that was cut by tilting several degrees in the (111) direction so that two mutually perpendicular steps were generated. The growth apparatus and other growth conditions are exactly the same as in Example 1.

第7図は成長温度に対する1サイクル当りの成長層の厚
み(1)の変化を模式的に示したものである。
FIG. 7 schematically shows the change in the thickness (1) of the grown layer per cycle with respect to the growth temperature.

成長温度がかなり低い時にはtは一定値を取り、その値
は(110)面に対する一分子層の厚みにほぼ一致する
。しかし、成長温度が高くなるにつれtは小さくなり、
次に再び一定値を取る領域がある。これが実施例1で述
べたように主としてステップの数で成長膜厚が律速され
ている領域である。更に温度を高めるとT3〜T4の領
域(T3:620°C,T4:650°C)で再度成長
膜厚が一定になる領域が現われる。T4以上に成長温度
を高めるとtはまた減少する。このT3〜T4の領域は
実施例1では現われず、ステップの交点における成長に
対応するものである。
When the growth temperature is considerably low, t takes a constant value, and its value approximately corresponds to the thickness of a single molecular layer relative to the (110) plane. However, as the growth temperature increases, t decreases,
Next, there is a region where the value is constant again. As described in Example 1, this is a region where the growth film thickness is mainly determined by the number of steps. When the temperature is further increased, a region where the grown film thickness becomes constant again appears in the region T3 to T4 (T3: 620°C, T4: 650°C). When the growth temperature is increased above T4, t also decreases. This region T3 to T4 does not appear in Example 1 and corresponds to growth at the intersection of steps.

(発明の効果) 以上述べたように、本発明による化合物半導体結晶の形
成方法を用いると、従来困難であった結晶表面において
ステップに沿った一次元的な結晶の成長を制御できるだ
けでなく、ステップの交点における一次元的成長も制御
できるようになる。
(Effects of the Invention) As described above, by using the method for forming a compound semiconductor crystal according to the present invention, it is possible not only to control the one-dimensional crystal growth along the steps on the crystal surface, which has been difficult in the past, but also to control the growth of the crystal along the steps. One-dimensional growth at the intersection of can also be controlled.

また成長結晶を種々に選ぶことにより、棟方向のへテロ
接合の成長も可能になり、今後新しいデバイスへの実現
につながる成長法である。
Furthermore, by selecting various growth crystals, it is possible to grow heterojunctions in the ridge direction, which is a growth method that will lead to the realization of new devices in the future.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明に依る結晶成長を説明するだめの結晶表
面の概略図、第2図は第1図の表面における吸着熱を説
明するための図、第3図は本発明に依るもう一つの結晶
成長を説明するための結晶表面の概略図、第4図は第3
図の表面における吸着熱を説明するための図、第5図は
実施例に用いた結晶成長装置の概略図、第6図は実施例
1cトおける成長温度とサイクル当りの成長層厚みの関
係を示す図、第7図は実施例2における成長温度とサイ
クル当りの成長層厚みの関係を示す図である。 図中の番号は、 1・・・上段成長室 2・・・トソースポート 3・、・下段成長室 4・・・基板結晶 5・・・基板ホルダー 6・・・基板結晶の移動 11・・・ステップ 13・・・基板結晶 第1図 (a)     基板結晶13 第2図 第3図 第4図 上q
FIG. 1 is a schematic diagram of a crystal surface to explain crystal growth according to the present invention, FIG. 2 is a diagram to explain the heat of adsorption on the surface of FIG. 1, and FIG. 3 is a schematic diagram of another crystal surface according to the present invention. Figure 4 is a schematic diagram of the crystal surface to explain the growth of two crystals.
Figure 5 is a schematic diagram of the crystal growth apparatus used in the example, and Figure 6 shows the relationship between the growth temperature and the growth layer thickness per cycle in Example 1c. The figure shown in FIG. 7 is a diagram showing the relationship between the growth temperature and the growth layer thickness per cycle in Example 2. The numbers in the figure are: 1... Upper growth chamber 2... Source port 3... Lower growth chamber 4... Substrate crystal 5... Substrate holder 6... Movement of substrate crystal 11... Step 13...Substrate crystal Fig. 1 (a) Substrate crystal 13 Fig. 2 Fig. 3 Fig. 4 upper q

Claims (2)

【特許請求の範囲】[Claims] (1)化合物半導体の構成元素あるいはその元素を含む
ガスを交互に基板結晶上へ供給して結晶成長を行なう方
法において、結晶の同一面内に構成元素が交互に配列さ
れ、かつ表面に結晶学的ステップを有する結晶を基板と
し、成長時には少なくとも一方の化合物半導体の構成元
素あるいはその元素を含むガスが前記ステップのみに吸
着しうる最適の基板温度、供給ガス圧力などの吸着条件
に設定しステップに沿って一列の吸着層を形成した後、
他の構成元素を供給し、分子列成長層を得ることを特徴
とする化合物半導体結晶の形成方法。
(1) In a method of crystal growth by alternately supplying the constituent elements of a compound semiconductor or a gas containing the elements onto a substrate crystal, the constituent elements are arranged alternately within the same plane of the crystal, and the surface has crystallographic characteristics. A crystal having a specific step is used as a substrate, and during growth, adsorption conditions such as optimal substrate temperature and supply gas pressure are set so that at least one constituent element of the compound semiconductor or a gas containing the element can be adsorbed only to the step. After forming a line of adsorption layer along the
A method for forming a compound semiconductor crystal, which comprises supplying other constituent elements to obtain a molecular column growth layer.
(2)化合物半導体の構成元素あるいはその元素を含む
ガスを交互に基板結晶上へ供給して結晶成長を行なう方
法において、結晶の同一面内に構成元素が交互に配列さ
れ、かつ表面で垂直に交れるステップが存在する結晶を
基板とし、成長時には少なくとも一方の化合物半導体の
構成元素あるいはその元素を含むガスが前記ステップの
交点のみに吸着しうる最適の基板温度、供給ガス圧力な
どの吸着条件に設定し前記交点に吸着させた後他の構成
元素を供給することにより、所望の結晶を成長せしめる
ことを特徴とする化合物半導体結晶の形成方法。
(2) In a method of crystal growth in which the constituent elements of a compound semiconductor or a gas containing the elements are alternately supplied onto the substrate crystal, the constituent elements are arranged alternately within the same plane of the crystal and are arranged vertically on the surface. A crystal with intersecting steps is used as a substrate, and during growth, adsorption conditions such as optimum substrate temperature and supply gas pressure are set such that at least one constituent element of the compound semiconductor or a gas containing that element is adsorbed only at the intersection of the steps. A method for forming a compound semiconductor crystal, characterized in that a desired crystal is grown by supplying other constituent elements after setting and adsorbing them to the intersection points.
JP19760786A 1986-08-22 1986-08-22 Production of compound semiconductor crystal Granted JPS6355191A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19760786A JPS6355191A (en) 1986-08-22 1986-08-22 Production of compound semiconductor crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19760786A JPS6355191A (en) 1986-08-22 1986-08-22 Production of compound semiconductor crystal

Publications (2)

Publication Number Publication Date
JPS6355191A true JPS6355191A (en) 1988-03-09
JPH0582358B2 JPH0582358B2 (en) 1993-11-18

Family

ID=16377283

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19760786A Granted JPS6355191A (en) 1986-08-22 1986-08-22 Production of compound semiconductor crystal

Country Status (1)

Country Link
JP (1) JPS6355191A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5102061A (en) * 1990-08-08 1992-04-07 Yazaki Corporation Brushless electric signal transmitting rotary device
JPH04233182A (en) * 1990-09-24 1992-08-21 Methode Electron Inc Clock spring housing and assembly

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5102061A (en) * 1990-08-08 1992-04-07 Yazaki Corporation Brushless electric signal transmitting rotary device
JPH04233182A (en) * 1990-09-24 1992-08-21 Methode Electron Inc Clock spring housing and assembly
JPH0656785B2 (en) * 1990-09-24 1994-07-27 メサッド エレクトロニクス インコーポレイテッド Clock spring housing and assembly

Also Published As

Publication number Publication date
JPH0582358B2 (en) 1993-11-18

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