JPS635518A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS635518A
JPS635518A JP14917886A JP14917886A JPS635518A JP S635518 A JPS635518 A JP S635518A JP 14917886 A JP14917886 A JP 14917886A JP 14917886 A JP14917886 A JP 14917886A JP S635518 A JPS635518 A JP S635518A
Authority
JP
Japan
Prior art keywords
impurity
semiconductor
coating liquid
impurities
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14917886A
Other languages
Japanese (ja)
Inventor
Takanori Hitomi
隆典 人見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP14917886A priority Critical patent/JPS635518A/en
Publication of JPS635518A publication Critical patent/JPS635518A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To perform a high density impurity doping on the first and the second semiconductor layers by a method wherein, after impurities have been coated on the surface of the first semiconductor layer, the second semiconductor layer is formed on the impurities, and the impurities are diffused on the first and the second semiconductor layers from between the two layers. CONSTITUTION:After an impurity coating liquid 12A has been coated on the surface of the first semiconductor layer (silicon substrate) 2, the second semiconductor layer (polysilicon layer) 10 is formed on said impurity coating liquid 12A. Then, the impurity coating liquid 12A, coated on the first and the second semiconductor layers 2 and 10 from between the two layers, is diffused. As a result, a high density doping can be made possible, and the impurity density can be increased on the region ranging from the boundary region of the first and the second semiconductor layers 2 and 10 toward the first and the second semiconductor layers 2 and 10.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体層に不純物を塗布して拡散する半導
体装置の製造方法に係り、特に、高濃度ドープに関する
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device in which impurities are applied and diffused in a semiconductor layer, and particularly relates to high concentration doping.

〔従来の技術〕[Conventional technology]

従来、多結晶層を電極として形成する半導体装置の製造
方法には、第3図に示すようなドープド・ポリ法が用い
られている。たとえば、N型のシリコン基板2の表面に
P型の導電領域4を形成し、その表面部分を覆う酸化膜
6を選択的に除いて開口8を形成した後、この開口8を
覆うポリシリコン層10を形成する。このポリシリコン
層10の表面に不純物を含有した有機塗布剤からなる不
純物塗布液12を塗布し、ポリシリコン層10から不純
物を矢印aに示すように、拡散してシリコン基板2の導
電領域4に到達させてポリシリコン層10を導電領域4
に対して電極としてのオーミックコンタクトとして形成
する。
Conventionally, a doped poly method as shown in FIG. 3 has been used as a method for manufacturing semiconductor devices in which a polycrystalline layer is formed as an electrode. For example, a P-type conductive region 4 is formed on the surface of an N-type silicon substrate 2, an oxide film 6 covering the surface portion is selectively removed to form an opening 8, and then a polysilicon layer covering the opening 8 is formed. form 10. An impurity coating liquid 12 made of an organic coating agent containing impurities is applied to the surface of the polysilicon layer 10, and the impurities are diffused from the polysilicon layer 10 into the conductive region 4 of the silicon substrate 2 as shown by arrow a. to reach the polysilicon layer 10 into the conductive region 4
It is formed as an ohmic contact as an electrode.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで、このようにポリシリコン層10の表面に不純
物塗布液12を塗布して、ポリシリコン層10の表面に
不純物を拡散させた場合、ポリシリコン層10およびシ
リコン基板2の導電領域4における不純物濃度分布は、
第4図の0に示すように、ポリシリコン層10において
高濃度を呈し、第4図のPに示すように、シリコン基板
2の表面では極端に低濃度となり、導電領域4での濃度
を高めることができない。
By the way, when the impurity coating liquid 12 is applied to the surface of the polysilicon layer 10 in this way and the impurity is diffused into the surface of the polysilicon layer 10, the impurity concentration in the polysilicon layer 10 and the conductive region 4 of the silicon substrate 2 is The distribution is
As shown at 0 in FIG. 4, the concentration is high in the polysilicon layer 10, and as shown in P in FIG. 4, the concentration is extremely low on the surface of the silicon substrate 2, increasing the concentration in the conductive region 4. I can't.

そこで、この発明は、不純物拡散された半導体層に対し
て不純物の拡散濃度を高めた半導体装置の製造方法を提
供することを目的とする。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device in which the impurity diffusion concentration is increased in a semiconductor layer in which impurities are diffused.

〔問題点を解決するための手段〕[Means for solving problems]

この発明の半導体装置の製造方法は、第1図に示すよう
に、第1の半導体N(シリコン基板2)の表面に不純物
(不純物塗布液12A)を塗布した後、その不純物(不
純物塗布液12A)上に第2の半導体N(ポリシリコン
層10)を形成し、第1および第2の半導体層(シリコ
ン基板2およびポリシリコンN10)に対して両者の間
から塗布した不純物(不純物塗布液12A)を拡散する
ことを内容とする。
As shown in FIG. 1, the method for manufacturing a semiconductor device of the present invention involves coating the surface of a first semiconductor N (silicon substrate 2) with an impurity (impurity coating liquid 12A), and then applying the impurity (impurity coating liquid 12A) to the surface of the first semiconductor N (silicon substrate 2). ), a second semiconductor N (polysilicon layer 10) is formed on the first and second semiconductor layers (silicon substrate 2 and polysilicon N10), and an impurity (impurity coating liquid 12A) is applied between the first and second semiconductor layers (silicon substrate 2 and polysilicon N10). ).

〔作   用〕[For production]

このようにすると、従来のポリシリコンJilOに不純
物(不純物塗布液12)を塗布して、シリコン基板2に
不純物を拡散する方法に対して、第1および第2の半導
体層(シリコン基板2およ〜びポリシリコン層10)の
間から不純物(不純物塗布液12A)を拡散するので、
高濃度ドープが可能になり、第1および第2の半導体層
の境界領域から第1および第2の半導体層に向かって不
純物濃度を高めることができる。
In this way, unlike the conventional method of applying an impurity (impurity coating liquid 12) to polysilicon JILO and diffusing the impurity into the silicon substrate 2, the first and second semiconductor layers (silicon substrate 2 and Since the impurity (impurity coating liquid 12A) is diffused between the polysilicon layer 10),
High concentration doping becomes possible, and the impurity concentration can be increased from the boundary region between the first and second semiconductor layers toward the first and second semiconductor layers.

〔実 施 例〕〔Example〕

以下、この発明の実施例を図面を参照して説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図はこの発明の半導体装置の製造方法の実施例を示
す。
FIG. 1 shows an embodiment of the method for manufacturing a semiconductor device of the present invention.

この実施例は、第3図に示した半導体装置の製造方法と
同様にポリシリコン層を電極として形成する方法である
This embodiment is a method of forming a polysilicon layer as an electrode, similar to the method of manufacturing a semiconductor device shown in FIG.

第1図のAに示すように、N型のシリコン基板2の表面
にP型の導電領域4を形成し、その表面部分を覆う酸化
膜6を選択的に除いて開口8を形成した後、この開口8
を覆って不純物塗布液12Aを塗布する。この不純物塗
布液12Aは、たとえば、ボロンなどの不純物を含有さ
せた有機塗布剤を用いる。
As shown in FIG. 1A, a P-type conductive region 4 is formed on the surface of an N-type silicon substrate 2, and an opening 8 is formed by selectively removing the oxide film 6 covering the surface portion. This opening 8
The impurity coating liquid 12A is applied to cover the substrate. This impurity coating liquid 12A uses, for example, an organic coating agent containing an impurity such as boron.

次に、第1図のBに示すように、不純物塗布液L2Aを
塗布したシリコン基板20表面にポリシリコンN10を
形成した後、第1図のCに示すように、ポリシリコン層
10の表面にも不純物塗布液12Aと同様の不純物塗布
液12Bを塗布して加熱処理を行う。
Next, as shown in B of FIG. 1, polysilicon N10 is formed on the surface of the silicon substrate 20 coated with the impurity coating liquid L2A, and then, as shown in C of FIG. Also, an impurity coating liquid 12B similar to the impurity coating liquid 12A is applied and a heat treatment is performed.

この結果、第1図のCに示すように、不純物塗布液12
Aによって矢印a、bで示す方向に不純物が拡散される
とともに、不純物塗布液12Bによって矢印Cで示すよ
うに不純物が拡散されてシリコン基板2の導電領域4に
到達させることができ、この結果、第1図のDに示すよ
うに、ポリシリコン層10は不純物の拡散によって、電
極として形成される。
As a result, as shown in FIG. 1C, the impurity coating liquid 12
A causes the impurities to be diffused in the directions shown by arrows a and b, and the impurity coating liquid 12B causes the impurities to be diffused in the directions shown by arrow C and can reach the conductive region 4 of the silicon substrate 2. As a result, As shown in FIG. 1D, polysilicon layer 10 is formed as an electrode by diffusion of impurities.

したがって、このようにすれば、シリコン基板2および
ポリシリコン層10における不純物濃度分布は、第2図
のXに示すようになる。すなわち、ポリシリコン層lO
の領域0の部分から領域Pで示す導電領域4に至る広い
範囲に亘って高濃度分布となり、シリコン基vi2側の
不純物濃度分布を向上させることができるとともに、ポ
リシリコン層10を導電性の高い電極として形成するこ
とができる。
Therefore, if this is done, the impurity concentration distribution in silicon substrate 2 and polysilicon layer 10 will become as shown by X in FIG. That is, the polysilicon layer lO
A high concentration distribution is obtained over a wide range from region 0 to the conductive region 4 indicated by region P, and the impurity concentration distribution on the silicon base vi2 side can be improved, and the polysilicon layer 10 can be made to have high conductivity. It can be formed as an electrode.

なお、実施例ではポリシリコン1110の表面に不純物
塗布液12Bを設置したが、これを省略した場合の不純
物濃度は、第2図のYに示すように、ポリシリコンM1
0と導電領域4との境界面が掻大点となる濃度分布を呈
する。このような不純物濃度でもポリシリコン層10を
電極として形成することができる。
In the example, the impurity coating liquid 12B was placed on the surface of the polysilicon 1110, but if this was omitted, the impurity concentration would be as shown by Y in FIG.
0 and the conductive region 4 exhibits a concentration distribution with a large point. Even with such an impurity concentration, polysilicon layer 10 can be formed as an electrode.

また、実施例ではN型のシリコン基板を用いたが、この
発明はP型のシリコン基板、その他の半導体層による基
板を用いても同様に実現でき、不純物はボロンの他に他
の不純物を用いても同様に適用できる。
Further, although an N-type silicon substrate was used in the embodiment, the present invention can be similarly realized using a P-type silicon substrate or a substrate made of other semiconductor layers, and the impurities may be other than boron. It can be applied in the same way.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、この発明によれば、第1および第
2の半導体層の間から不純物を第1および第2の半導体
層に対して直接ドープすることができるとともに、第1
および第2の半導体層に対する不純物の高濃度ドープを
実現することができ、たとえば、第1の半導体層に対し
て第2の半導体層を電極としてのオーミックコンタクト
として形成することができる。
As described above, according to the present invention, impurities can be directly doped into the first and second semiconductor layers from between the first and second semiconductor layers, and
In addition, the second semiconductor layer can be doped with impurities at a high concentration, and for example, the second semiconductor layer can be formed as an ohmic contact as an electrode with respect to the first semiconductor layer.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の半導体装置の製造方法を示す図、第
2図は第1図に示した半導体装置の製造方法を実施した
場合の不純物濃度を示す図、第3図は従来の半導体装置
の製造方法を示す図、第4図は第3図に示した半導体装
置の製造方法を実施した場合の不純物濃度を示す図であ
る。 2・・・第1の半導体層としてのシリコン基板、10・
・・第2の半導体層としてのポリシリコン層、12A、
12B・・・不純物塗布液。 第2図 と 第1図
FIG. 1 is a diagram showing the method for manufacturing a semiconductor device of the present invention, FIG. 2 is a diagram showing the impurity concentration when the method for manufacturing the semiconductor device shown in FIG. 1 is implemented, and FIG. 3 is a diagram showing the conventional semiconductor device. FIG. 4 is a diagram showing the impurity concentration when the method for manufacturing the semiconductor device shown in FIG. 3 is carried out. 2... Silicon substrate as a first semiconductor layer, 10.
...Polysilicon layer as a second semiconductor layer, 12A,
12B... Impurity coating liquid. Figure 2 and Figure 1

Claims (1)

【特許請求の範囲】[Claims] 第1の半導体層の表面に不純物を塗布した後、その不純
物上に第2の半導体層を形成し、第1および第2の半導
体層に対して両者の間から不純物を拡散することを特徴
とする半導体装置の製造方法。
After applying an impurity to the surface of the first semiconductor layer, a second semiconductor layer is formed on the impurity, and the impurity is diffused into the first and second semiconductor layers from between the two. A method for manufacturing a semiconductor device.
JP14917886A 1986-06-25 1986-06-25 Manufacture of semiconductor device Pending JPS635518A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14917886A JPS635518A (en) 1986-06-25 1986-06-25 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14917886A JPS635518A (en) 1986-06-25 1986-06-25 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS635518A true JPS635518A (en) 1988-01-11

Family

ID=15469501

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14917886A Pending JPS635518A (en) 1986-06-25 1986-06-25 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS635518A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5491107A (en) * 1993-01-21 1996-02-13 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
US5792700A (en) * 1996-05-31 1998-08-11 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
US6024661A (en) * 1997-10-28 2000-02-15 Wilson Sporting Goods Co. Sweat-absorbing game ball
KR100351553B1 (en) * 1997-07-29 2002-10-18 주식회사 엘지씨아이 React tube used at constituting chemical library introducing combinatorial chemistry at solid phase
US8778126B2 (en) 2006-05-30 2014-07-15 Kuraray Co., Ltd. Base material for artificial leather and grained artificial leather
US8883662B2 (en) 2007-03-30 2014-11-11 Kuraray Co., Ltd. Leather-like sheet bearing grain finish and process for producing the same

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5491107A (en) * 1993-01-21 1996-02-13 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
US5792700A (en) * 1996-05-31 1998-08-11 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
US6048781A (en) * 1996-05-31 2000-04-11 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
KR100351553B1 (en) * 1997-07-29 2002-10-18 주식회사 엘지씨아이 React tube used at constituting chemical library introducing combinatorial chemistry at solid phase
US6024661A (en) * 1997-10-28 2000-02-15 Wilson Sporting Goods Co. Sweat-absorbing game ball
US8778126B2 (en) 2006-05-30 2014-07-15 Kuraray Co., Ltd. Base material for artificial leather and grained artificial leather
US8883662B2 (en) 2007-03-30 2014-11-11 Kuraray Co., Ltd. Leather-like sheet bearing grain finish and process for producing the same

Similar Documents

Publication Publication Date Title
US3664896A (en) Deposited silicon diffusion sources
KR970004078A (en) Semiconductor device and manufacturing method
US3627598A (en) Nitride passivation of mesa transistors by phosphovapox lifting
US3456168A (en) Structure and method for production of narrow doped region semiconductor devices
JPS635518A (en) Manufacture of semiconductor device
US3933541A (en) Process of producing semiconductor planar device
KR850000786A (en) Semiconductor device and manufacturing method thereof
JPS6212669B2 (en)
JPS61105868A (en) Semiconductor device
JPS62102560A (en) Diode
US3959810A (en) Method for manufacturing a semiconductor device and the same
JPS5830735B2 (en) Handout Taisouchino Seizouhouhou
JPH01194453A (en) Semiconductor device
JPS6129538B2 (en)
JP2532392B2 (en) Method for manufacturing semiconductor device
JPS57133672A (en) Semiconductor device
JPH02203526A (en) Semiconductor device
JPS57199251A (en) Semiconductor device
JPH05283715A (en) Highly stable zener diode
JPH02281732A (en) Manufacture of semiconductor device
JPS61150223A (en) Manufacture of semiconductor device
JPS58122769A (en) Manufacture of semiconductor device
JPH05335329A (en) Semiconductor device and its manufacture
JPS59117217A (en) Manufacture of semiconductor element
JPS61198674A (en) Manufacture of semiconductor device