JPH01194453A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the functions and integration of a stacked source, drain MOS transistor by forming a p-n-p junction or an n-p-n junction of a second selectively epitaxial layer, a base region and an emitter diffused region. CONSTITUTION:After a thin oxide film is formed by thermally oxidizing on a P-type semiconductor substrate 1 formed with a field oxide film 2, polysilicon is grown. The polysilicon of a gate electrode 5 remains by gate etching, and the polysilicon except it is removed. The periphery of the polysilicon of the gate electrode is covered by thermally oxidizing with an SiO2. Then, a thin oxide film on the substrate is removed. Then, an epitaxial layer is grown by first selectively epitaxial growth, arsenic (As+) is diffused, thereby forming an N<+> type first selectively epitaxial layers 31, 43. Then, a second selectively epitaxial growth is conducted, As+ is diffused to form an N-type second selectively epitaxial layers 32, 42. After a third selectively epitaxial growth is conducted, boron (B<+>) is diffused at a source side to form a P-type base layer 33, and As<+> is diffused at a drain side to form an N<+> type contact layer 43. An N<+> type emitter diffused region 34 is formed by diffusing the As<+> at the source side.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a semiconductor device, and particularly to a semiconductor device having a stacked source/drain structure.

Aiming for multi-functionality and high integration.

a gate electrode (5) formed in a predetermined region on the semiconductor substrate vi (1) and surrounded by an insulating film; and an epitaxial layer formed on the semiconductor substrate and in contact with the insulating film on both sides of the gate electrode. In a semiconductor device having source and drain regions consisting of p-n in stacked drain structure
- A semiconductor device characterized by including a p junction or an np junction.

[Industrial application field]

The present invention relates to a semiconductor device, and particularly to a semiconductor device having a stacked source/drain structure.

2. Description of the Related Art Semiconductor devices are required to be highly integrated, and even more multifunctional. Therefore, it is necessary to develop a semiconductor device that meets these demands.

[Conventional technology]

In order to prevent short channel effects in MOS) transistors, MO3I transistors with a stacked source-drain structure using epitaxial layers have been developed.

FIG. 3 shows the structure of a conventional stacked source-drain MOS transistor. A poly-Si gate electrode 5 surrounded by an insulating film is formed on a p-type semiconductor substrate l on which a field oxide film 2 is formed.

Next, a stacked source structure 3 and a stacked drain structure 4 of n+ epitaxial layers are formed as source and drain regions on the substrate on both sides of the insulating film. Next, an insulating film (SiOz) is applied to the entire surface using the CVD method.
After opening windows where the drain and source electrodes will be formed, AI is deposited.

Drain electrode 6 by ion milling. Source electrode 9
form.

In the conventional method of forming source/drain regions by ion diffusion into the substrate, ions diffuse under the gate during the diffusion and subsequent steps, resulting in a short channel effect.

The effect becomes larger as the gate length becomes shorter, and becomes an obstacle to higher integration.

Since the stacked source/drain structure has very little diffusion into the substrate, it is an effective measure to prevent the short channel effect that accompanies higher integration.

[Problem to be solved by the invention]

The present invention uses a conventional stacked source/drain structure (MO3).
It is an object of the present invention to provide a semiconductor device in which a transistor has more functions and is highly integrated.

[Means to solve the problem]

FIG. 1 shows a semiconductor device of the present invention. Figure (a) is an example of a cross-sectional structure.

In figure (a), l is a semiconductor substrate, 2 is a field oxide film, 3 is a stacked source structure, 31 is a first selective shrimp layer, and 32 is a second selective shrimp layer (source (S) and collector (
C) region), 33 is a base region, 34 is an emitter diffusion region, 4 is a stacked drain structure, 41 is a first selection layer, 42 is a second selection layer, 43 is a contact layer, 5 is a gate (G) The electrodes include a drain (D) electrode, 7 a base (B) electrode, and an emitter (E) electrode.

In the structural example of FIG. 1(a), a pnp junction or npn junction is formed in the stacked source structure 3, and FIG. 9(b) is an equivalent circuit thereof.

A gate electrode (5) formed in a predetermined region on a semiconductor substrate (1) and surrounded by an insulating film, and an epitaxial layer formed on both sides of the gate electrode on the semiconductor substrate and in contact with the insulating film. In the semiconductor device having source and drain regions, the epitaxial layer has a stacked source structure (3) and a stacked drain structure (4) in which a plurality of layers are stacked, and the epitaxial layer has a stacked source structure (3) and a stacked drain structure (4) in which a plurality of layers are stacked, and p-n- in the drain structure
The above problem can be solved by a semiconductor device characterized by including a p-junction or an n-p-n junction.

[Effect]

In FIG. 1(a), a p-n-p junction or a fi-p-n junction is formed by the second selective shrimp layer 32, the base region 33, and the emitter diffusion region 34.

In this way, it is possible to realize a semiconductor device that includes the functions of both a MOS transistor and a bipolar transistor in approximately the same space as a conventional stacked source-drain structured MOS transistor, thereby achieving multifunctionality and high integration. .

〔Example〕

FIG. 2 shows an example of a manufacturing process for realizing the semiconductor device of the present invention.

See Figure 2 (a) (i) After forming a thin oxide film by thermal oxidation on the p-type semiconductor substrate 1 on which the field oxide film 2 has been formed, poly-Si is grown by chemical vapor deposition (CVD). . By gate etching, the poly Si of the gate electrode 5 is left and the other poly Si fc is removed. The periphery of the poly-Si of the gate electrode is covered with SiO2 by thermal oxidation. Remove the thin oxide film on the substrate.

Refer to Figure 2 (b) (ii) During the first selected shrimp growth, a 2,000-person thick shrimp layer was grown, and arsenic (As”) was diffused to form the n-type first selected shrimp layer 31.41. Form.

See Figure 2 (c) (iii) Perform the second selective shrimp growth, and As +
is diffused to form an n-type second selection shrimp layer 32.42 (thickness 50
00 people). The shrimp layer 32 is a source (S) and collector (C) e! area.

After performing the third selective growth, boron (B+) is diffused on the source side to form a p-type base layer 33 (with a thickness of 2000 mm).
On the drain side, As+ is diffused to form an n+ type contact layer 43 (thickness: 2000).

An n+ type emitter diffusion region 34 (thickness: 1000 nm) is formed on the source side by diffusion of As+.

See Figure 2 (d) (iv) Apply an insulating film (SiO2) to the entire surface using the CVD method, open windows at the locations where the drain electrode, base electrode, and emitter electrode will be formed, then evaporate AI, and use ion milling to form the drain electrode. 6. Base electrode7. An emitter electrode 8 is formed.

In this way, the area occupied by a conventional stacked source-drain structure MOS transistor.

A semiconductor device combining a MOS transistor and a bipolar transistor can be formed.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to realize a highly integrated semiconductor device having multiple functions combining bipolar transistor function and MOS transistor function.

According to the present invention, a semiconductor device having the same function as a conventional bipolar CMOS transistor can be formed on about 70% of the area of the conventional device, which greatly contributes to higher integration and higher speed of devices.

[Brief explanation of the drawing]

FIG. 1 shows a semiconductor device of the present invention. Figure 2 shows the manufacturing process. Figure 3 is a conventional example It is. In the figure. 1 is a semiconductor substrate. 2 is a field oxide film. 3 is a stacked source structure. 4 is a stacked drain structure. 5 is a gate electrode. 6 is the drain electrode. 7 is the base electrode. 8 is the emitter electrode. 9 is the source electrode. 31.41 is the first choice shrimp layer. 32.42 is the second choice shrimp layer. 33 is the base area. 34 is an emitter diffusion region. 43 is a contact layer Anti-blind flag is raised B Now Ika Dorei ``Semiconductor device according to the present invention'' Source 1 each (b) 糎、附　　　　　　　　　　　　　　　　　　　　　　　,L Figure 2 f)1) 1 屹j Takashi Yuji 1 year old Figure 2 (Ma f) 2)

Claims (1)

[Claims] A gate electrode (5) formed in a predetermined region on a semiconductor substrate (1) and surrounded by an insulating film, and an epitaxial layer formed on both sides of the gate electrode on the semiconductor substrate and in contact with the insulating film. In the semiconductor device having source and drain regions, the epitaxial layer has a stacked source structure (3) and a stacked drain structure (4) in which a plurality of layers are stacked, and the epitaxial layer has a stacked source structure (3) and a stacked drain structure (4) in which a plurality of layers are stacked, and p-n in the drain structure
- A semiconductor device characterized by including a p junction or an np junction.