JPS6353659A - Image memory device - Google Patents

Image memory device

Info

Publication number
JPS6353659A
JPS6353659A JP61196867A JP19686786A JPS6353659A JP S6353659 A JPS6353659 A JP S6353659A JP 61196867 A JP61196867 A JP 61196867A JP 19686786 A JP19686786 A JP 19686786A JP S6353659 A JPS6353659 A JP S6353659A
Authority
JP
Japan
Prior art keywords
data
address
write
memory
data bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61196867A
Inventor
Itsuo Hari
Kazuhiro Yamamoto
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Priority to JP61196867A priority Critical patent/JPS6353659A/en
Publication of JPS6353659A publication Critical patent/JPS6353659A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To freely allocate physical memories in a logical address space for the unit of blocks and to use the memories efficiently by providing an address conversion table set by the output of a computer.
CONSTITUTION: For operating an image memory device, a memory address signal to access an address bus 5 is outputted. In the case of writing, write data is outputted to a data bus 16, and a memory write command 11 is made enable. Write plane specification data is previously set to a register 10 due to the output of the computer. An RAS.CAS signal generator circuit 13 makes enable signals RAS and CAS in a layer specified by the reading of the register 10, activates DRAMs 1W4, and writes data on the data bus at a specified address. In the case of reading, a memory read command signal 12 made enable. A multiplexer 15 selects one plane and outputs its data on the data bus.
COPYRIGHT: (C)1988,JPO&Japio
JP61196867A 1986-08-22 1986-08-22 Image memory device Pending JPS6353659A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61196867A JPS6353659A (en) 1986-08-22 1986-08-22 Image memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61196867A JPS6353659A (en) 1986-08-22 1986-08-22 Image memory device

Publications (1)

Publication Number Publication Date
JPS6353659A true JPS6353659A (en) 1988-03-07

Family

ID=16364965

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61196867A Pending JPS6353659A (en) 1986-08-22 1986-08-22 Image memory device

Country Status (1)

Country Link
JP (1) JPS6353659A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100982440B1 (en) 2008-06-12 2010-09-15 (주)명정보기술 System for managing data in single flash memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100982440B1 (en) 2008-06-12 2010-09-15 (주)명정보기술 System for managing data in single flash memory

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