JPS6134643A - Buffer control system - Google Patents

Abstract

PURPOSE:To control a substantial main storage access time of each virtual computer by providing a means for limiting the quantity of a buffer which each virtual computer can use, to a bank unit of the buffer. CONSTITUTION:When selecting a bank for writing a new data block, a control circuit 8 refers to not only control information 7 but also identification number indicating registers 11-1-11-n and an identification number register 12, and knows a bank which a virtual computer can use, by the registers 11-1-11-n. Also, the bak whose access is the oldest in its banks is determined based on the control information 7, and a word of its bank is informed to a buffer registration control circuit 9. The circuit 9 writes a data block and an address in the word of this bank. In this way, a word having a bank in which a tag part 6 coincides with a high rank address 3 at the time of read-out from the buffer, and also an identification number which coincides with a register 12 corresponding to the bank is selected as an object data block word.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a buffer control method for a processing device that operates a virtual machine.

A virtual computer system is a computer system in which one or more virtual computer systems, that is, virtual computers, are configured within one computer system, and the virtual computers can operate as if they were mutually independent computers. Widely used as a control method.

Although the plurality of virtual machines are logically independent, they physically share the same computer hardware in a time-sharing manner, so they mutually affect iJ in terms of processing speed and the like.

For this purpose, the performance of the virtual machine can be increased by 1 liter by increasing or subtracting the computer resources allocated to each virtual machine in accordance with the requests from the work etc. executed on each virtual machine.
A means of controlling J is required.

[Prior Art and Problems to be Solved by the Invention] Conventionally, as a means for controlling the performance of virtual machines, the method of controlling the above-mentioned 10 assignments (3) to each virtual machine has been used.

In other words, in the virtual computer method, the main storage device is divided and allocated to each virtual computer, and each virtual computer uses the above-mentioned 1.0 area allocated to it to store the main memory that constitutes its own virtual computer. Look down and control it as if it were a device.

Therefore, by increasing or decreasing this allocation amount, a performance control effect similar to that obtained by increasing or decreasing the size of the main memory of a regular computer system can be obtained.

However, since this effect is relatively indirect, there is a need for a means to more accurately control performance either alone or in combination with the above means.

As is well known, the central processing unit of many computer systems has a relatively small capacity and high speed memory that holds a copy of the information in the main memory, thereby making it possible to access the main memory at substantially higher speeds. Technology is being used to change the situation.

FIG. 2 shows an example of the structure of such a buffer. Known buffer control will be briefly described below for the case of a main memory read access request.

It is assumed that the address 1a to which access is requested is placed in the address register 2.

Normally, the buffer includes a data block section 5 of a fixed length and a part of the storage address of the block on the device described in 1.1 (for example, the upper bit string 3 of the storage address of the address register 2).
Each bank is composed of a plurality of banks 1-1 to 1-n each having the same number of words, with each word containing the tag section 6 holding the same number of words as a unit.

The lower bit string of the storage address is used as an address to select one word in the bank, and in the Sofa access, each bank 1-1 to 1 selected by this address is used.
-n words are read out all at once, and a word whose tag portion has the same content as the upper address 3 is selected as the word of the target data block.

If, as a result of the above operation, there is no matching address in the buffer, it is necessary to actually access the host m device to obtain the data, which increases the access time.

In this case, the data blocks read from the ten devices described above are stored in one word selected from among the edicts of all banks addressed in the same manner as described above, together with the second-place hint string of the address.

For selection in this case, for example, control information 7 is provided for the word group addressed by the alphanumeric lower bit string 4, and this information is constantly updated by the control circuit 8 during buffer access. This makes it possible to determine which edict was most recently accessed among words within the same word group.

This information is input to the control circuit 8 to select one word, and the buffer registration control circuit 9 writes the data in the write data registers 10-1 to 10-0 to the selected word.

As is clear from the above, the probability that the desired data can be obtained from the buffer changes depending on the number of buffer banks, and therefore the actual main memory access time changes, which directly affects the performance of the computer. Conventionally, there has been no method for controlling the performance of a virtual machine by controlling a buffer.

[Means for solving problems]

The above problem is that keeping a copy of the information in main memory,
In the case where a virtual machine is operated on a processing device having a buffer consisting of a plurality of banks, the problem is solved by the buffer control method of the present invention in which the banks are individually assigned to the virtual machine.

[Effect]

In other words, since a means is provided to limit the amount of buffer that each virtual machine can use in units of buffer banks, this means makes it possible to control the actual main memory access time of each virtual machine. performance can be controlled more directly.

〔Example〕

FIG. 1 is a block diagram of one embodiment of the present invention.

In the figure, the same parts as in FIG. 2 are designated by the same reference numerals.

The control of allocating a buffer bank to a virtual machine is achieved by controlling, when accessing a buffer, reading and writing only to the bank that is allocated to the virtual machine that requested the access.

For this control, each virtual machine is given an identification number to identify it, and the identification number of the virtual machine currently being executed is displayed in the identification number register 12.

Further, for example, identification number instruction registers 11-1 to 11-n are provided, one for each bank, to display virtual d1 computer identification numbers that permit use of each bank.

When selecting a bank to write a new data block, the control circuit 8 refers to the identification number instruction registers 11-1 to 11-n and the identification number register 12 in addition to the control information 7, and displays the information in the identification number register 12. Identification number instruction registers 11-1 to 11- indicate banks that can be used by the virtual machine.
n, the bank with the oldest recent access is determined based on the control information 7, and the word of the bank is notified to the buffer registration control circuit 9.

The buffer registration control circuit 9 writes the data block and address in the notified bank word as described above.

When reading from the buffer, the tag part 6 and the upper address □ match the bank, and the identification number instruction register 1
Among 1-1 to 11-n, a word whose register corresponding to the bank has an identification number matching the identification number register 12 is selected as the edict of the target data block.

With the above control, the data blocks requested by each virtual machine are held in the banks specified by the identification number instruction registers 11-1 to 11-n, and the buffer bank allocation to the virtual machine is changed. Realized.

〔Effect of the invention〕

As is clear from the following explanation, the present invention provides a means for controlling the performance of a virtual machine more accurately than before, and has the remarkable industrial effect of improving the usability of the virtual machine system. be.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, and FIG. 2 is a block diagram of the configuration of a conventional buffer. In the figure, 1=1 to 1-n are banks, 2 is address register,
7 is control information, 8 is a control circuit, 9 is a buffer registration control circuit, 10-1 to 10-n are write data registers, 11-1
.about.11-n indicates an identification number instruction register, and 12 indicates an identification number register.

Claims (1)

[Claims] In the case where a virtual computer is operated on a processing device that holds a copy of information in a main storage device and has a buffer consisting of a plurality of banks, the buffer control is characterized by having means for individually allocating the banks to the virtual computer. method.