JPS6353153U - - Google Patents
Info
- Publication number
- JPS6353153U JPS6353153U JP14441786U JP14441786U JPS6353153U JP S6353153 U JPS6353153 U JP S6353153U JP 14441786 U JP14441786 U JP 14441786U JP 14441786 U JP14441786 U JP 14441786U JP S6353153 U JPS6353153 U JP S6353153U
- Authority
- JP
- Japan
- Prior art keywords
- data transfer
- cpu
- hold
- control device
- detection means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Bus Control (AREA)
Description
第１図は本考案装置の一実施例の概略構成図、
第２図は本考案の一実施例におけるタイムチヤー
ト、第３図は従来のＤＭＡ転送のタイムチヤート
である。
１…ＤＭＡコントローラ、２…ＡＮＤゲート（
検知手段）、３…Ｄフリツプフロツプ（ホールド
要求保持手段）。
FIG. 1 is a schematic configuration diagram of an embodiment of the device of the present invention;
FIG. 2 is a time chart in one embodiment of the present invention, and FIG. 3 is a time chart of conventional DMA transfer. 1...DMA controller, 2...AND gate (
detection means), 3...D flip-flop (hold request holding means).
Claims (1)
ホールド状態にして、同一バスに複数接続される
周辺装置間でのＣＰＵを介在させない直接のデー
タ転送を制御するデータ転送制御装置において、
データ転送を行う所定のチヤンネルでのデータ転
送期間であることを検知する検知手段と、該検知
手段でデータ転送期間中であると検知されている
間はＣＰＵに対するホールド要求の信号を送出し
続けるホールド要求保持手段とを備えることを特
徴とするデータ転送制御装置。 In a data transfer control device that sends a hold request signal to a CPU, puts the CPU in a hold state, and controls direct data transfer between multiple peripheral devices connected to the same bus without the intervention of the CPU,
A detection means for detecting that it is a data transfer period on a predetermined channel for data transfer, and a hold that continues to send a hold request signal to the CPU while the detection means detects that the data transfer period is in progress. A data transfer control device comprising: request holding means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14441786U JPS6353153U (en) | 1986-09-19 | 1986-09-19 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14441786U JPS6353153U (en) | 1986-09-19 | 1986-09-19 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6353153U true JPS6353153U (en) | 1988-04-09 |
Family
ID=31054999
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14441786U Pending JPS6353153U (en) | 1986-09-19 | 1986-09-19 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6353153U (en) |
-
1986
- 1986-09-19 JP JP14441786U patent/JPS6353153U/ja active Pending